Algorithmic Transformations in the Implementation of K-Means Clustering on Reconfigurable Hardware

Abstract

In mapping the k-means algorithm to FPGA hardware, we examined algorithm level transforms that dramatically in-creased the achievable parallelism. We apply the k-means al-gorithm to multi-spectral and hyper-spectral images, which have tens to hundreds of channels per pixel of data. K-means is an iterative algorithm that assigns assigns to each pixel a label indicating which of K clusters the pixel belongs to. K-means is a common solution to the segmentation of multi-dimensional data. The standard software implementa-tion of k-means uses oating-point arithmetic and Euclidean distances. Floating point arithmetic and the multiplication-heavy Euclidean distance calculation are ne on a general purpose processor, but they have large area and speed penal-ties when implemented on an FPGA. In order to get the best performance of k-means on an FPGA, the algorithm needs to be transformed to eliminate these operations. We examined the eects of using two other distance measures, Manhattan and Max, that do not require multipliers. We also examined the eects of using xed precision and truncated bit widths in the algorithm. It is important to explore algorithmic level transforms and tradeos when mapping an algorithm to recongurable hardware. A direct translation of the standard software im-plementation of k-means would result in a very inecient use of FPGA hardware resources. Analysis of the algorithm and data is necessary for a more ecient implementation. Our resulting implementation exhibits approximately a 200 times speed up over a software implementation. 1