IEEE / Institute of Electrical and Electronics Engineers
Doi
Abstract
This paper proposes a compact synthesis approach for reduced-order behavioral macromodels of linear circuit blocks for RF and Mixed-Signal design. The proposed approach revitalizes the classical synthesis of lumped linear and timeinvariant multiport networks by reactance extraction, which is here exploited to obtain reduced-order equivalent SPICE netlists that can be used in any type of system-level simulations, including transient and noise analysis. The effectiveness of proposed approach is demonstrated on a real design applicatio