Design of on-chip RFID transponder antennas

Abstract

Manufacturing the transponder antenna directly on top of the silicon substrate of the transponder integrated circuit has the advantage of a cheap and miniaturized transponder tag. No additional mounting and joining processes is necessary. For passive transponder tags the complete system can be fabricated using the standard CMOS process. The size of the antenna depends on the wavelength of the transmission frequency. In the presented project a frequency of 61 GHz was chosen. This makes it possible to design a chip of about one square millimeter. In modern silicon technologies, there is more than enough space behind the area of the antenna for the necessary electronic circuit. Regarding the high frequency and the small antenna diameter, only a very small amount of energy is expected to be available for powering the electronic circuit. Therefore, only identification and authentication with embedded cryptographic functions are planned for applications with a reading range of about five millimeters in the first steps. More energy-critical functions like passive sensor measurements will be addressed in the future. In general the design process of the transponder antenna is an iterative process based on high frequency electromagnetic field simulations. The process is similar to the design of customized UHF antennas. The antenna type is a slot antenna, consisting of the antenna slot itself and a surrounding frame. The conductive substrate material results in unavoidable losses. However, an antenna gain of 1.5 dB is achieved. The antenna gain can be boosted up to 5.6 dB with a metallic backplane on the chip with the right thickness. Additional losses, originating from the metallic filling structures in the circuit are already included in these numbers. The filling structures are necessary for technological reasons in the manufacturing process: the metallic covering has to be between a minimum and a maximum value. The filling area behind the frame does not reduce the antenna quality. In this area also the electronic circuit is placed. The filling directly below the antenna structure itself should be at the minimum allowed value. A critical point is the influence of the filling to the antenna impedance parameters. These parameters have to be fitted to the input parameters of the electronic circuit for an optimal match. Unfortunately the filling structures are restricted by the technology rules and are too complex to be simulated in the field simulations. On the other hand, the antenna and the electronic parts are manufactured in the same steps. A post-process matching is impossible. Therefore, a first antenna on silicon substrate is manufactured and verified to find differences between simulation and real measurement. This will help to find a simplified model of the filling structures in the simulation and to allow a spot landing of the antenna impedance to the complex conjugated circuit impedance after manufacturing