In this paper, the parallel inverter circuit with the load consisted of resistive load and constant reactive load in parallel, is analyzed taking into acourlt the d-c source reactance. The circuit has a good voltage regulation for the variation of resistive load current, except the vicinity of no load. The design method in using the results of analysis is also discussed

Fujitsuka, Takesi

Himei, Toyoji

Wakabayashi, Jiro

Okayama University Scientific Achievement Repository

MEMOIRS OF THE SCHOOL OF ENGINEERING, OKAYAMA UNIVERSITY Vol. 6, No. I, SEPTEMBER 1971Analysis and Design of Parallel InverterCircuit with Parallel Inductive LoadTakesi FUJITSUKA, Toyoji HIMElDepartment of Electrical Engineeringand Jiro W AKABAY ASH!Engineering Research Institute, Kyoto University(Recived Apr. 30, 1971)SynopsisIn this paper, the parallel inverter circuit with the load consisted of resistiveload and constant reactive load in parallel, is analyzed taking into acourltthe doc source reactance.The circuit has a good voltage regulation for the variation of resistive loadcurrent, except the vicinity of no load.The design method in using the results of analysis is also discussed.RRFig.2 Equivalent circuits of parallel inverter.-=-ETparallel.4) The source current is is continuous.5) The period in every half cycle is equal to to.From these asumptions, the equivalent circuitsof the circuit in Fig. 1 are given as shown inFig. 2 (a), (b).§ 1. IntroductionIn the parallel inverter circuit with trans-former, the effects of transformer excitingreactance on circuit performance has beeninvestigatedo. Consequently, it is explainedthat some values of exciting reactance of trans-former are usefull to improve the voltageregulatlon.By using this characteristics, the parallel in-verter circuit having a good voltage regulationcan be designed.Eqs. (1)-(4) are rewritten In the operationalmatrix form as follows.§ 3. Circuit analysisFrom Fig.2, following equations are intro-duced.Fig. I Bridge type parallel inverter circuit withparallel inductive load.§ 2. AsuIUptions and equivalent circuitsFor the analysis of the circuit is shown inFig. 1, following asumptions are introduced.1) Resistances of reactor, doc source, capacitor,etc. are negligible.2) On the thyristor, leakage current in uncon-ducting condition, voltage drop in conductingcondition, turn-on time and reverse current atturn-off, are negligible.3) The load is consisted of resistance Randconstant indactance L that is connected inL dis/dt+va=EL dijdt= Vo(1)(2)(3)(4)6162 T. FUJITSUKA, T. HIMEr and J. WAKABAYASHITherefore, from Eq. (1)['0Jo Va dt= Eto (12)where, i'=is-iL , l/L'=l/Ls+l/L, i'+OandVa+0 are initial values of i' and Va. Solving Eq.(5) and transforming into the time function,we haveThen, from Eq. (2). 1 flO . +0lw = TJo Vc dt+l 1. (13)(6)In Eq. (13), as iw = - iL +0,(14)where, [cp] is a term related to the source vol-tage E, and [X] is a term related to the initialconditions.Substituting to, that is, the time interval ofthe first circuit mode or of the half cycle, intoEq. (6), we havewhere, i/o and VaD are final values of i' andVa in the first circuit mode.The inverter circuit is a periodically interr-upted circuit which is operated symmetrically.Therefore, in steady state, Va and iL are sym-metrical waves, and the wave formes of is aresame in both the first and the second circuitmodes. Thus, Vao = - Va +0, iw = - iL +0, iSD = is+0.From these relation,By the use of Eqs. (14), (9) and (6), the waveforms of Va and i' in the steady state are obta-ined.Now, the parameter Y, X s, X, Js, J and Kare determined as follows. Y =(I}C, X =(I}L,X=(I}L, Js=YXs, J=YXandK=YR. Where,(J) is the angle velocity of the inverter drivingfrequency. Substituting these relations intoEqs. (14), (9) and (6), the wave forms of I'a aredepicted in dimentionless form by the parame-ters ofJ~, J and K, but the current i' can notbe caluculated by these three parameters.[ it] [it+oJo = [SCoJE+ [XoJ +0VaD Va(7)20jILS~+1110i0.5'/f\substituting Eq. (8) and Vao= -I'a+o into Eq.(7), we haveJ$~W·Cls'"'2.o.J:.~~c L"'tsK-WCR"2.01"1000 (Hi), C=15." C"FJL-1,3Q (mH), ls~3.18 (ll1H)R"20 (.Q-J, e"l (V)oI."r_wt-100 {L(8)(9)[ ito J= ([ UJ - [XoJ [AJt 1 { [SCoJEVao+ [XoJ [2~w]where, [U] is a unit matrix, and [A] is atransformation matrix as follows. Fig.3 Calculated example of wave forms.In the steady state, iw can be determined asfollows. Since the relation iSD = is+0 is obtained,[ ito JC=iAJ[itoJ=[l 0J[itoJ (10)- Vao " VCD °-1 VCDflO dis dt L [. JIO °Ls Jo dt = S ls 0 = (11 )The digital computer is used for the calcula-tion. In Fig. 3, the caluculated example ofwave forms is shown. In Fig. 4, the waveforms of valE are shown, and minimam valuesof parameters JS=(I}2CLs in the wave formswith each same values of parameters K=w CRand J = (l}2 CL, are corespond to boundary poin twhere source current comes to be interrupted.Parallel Inverter with Parallel Inductive Load 6320222.:r=10~·1.5(e)--1<·1----- K-O.5~Iw _.- 1<=0.2If\,'"',• l ,I 1\ '" A" ~I,' ~~ ....... _..... ~: $ J's=O.D8;]'=3000t-'1'----------lOI-I-f-;f-------.....-lo-I-132--K-1----- K-O"-'-1(:0.7-Ica.)--1<-10----. K= 5-'-1<-2~wI1--"7'"7r-------jOFig.4 Caluculated wave forms of capacitor voltage.5~1 Jrl25 ~'"J$=2:ts ~)wJ..55 ~w1 ~·10210.\ 0.2 0.5Fig. 5 Capacitor voltage in effective value.The effective values of capactitor voltage Vaare shown in Fig. 5, only in the case that thesource current is continuous. The boundaryconditions which source current is is turned tointerrupted condition from continuous, areshown in Fig. 6.The mean value of source current Is is de-termined as follows.(15)§ 4. Experitnental resultIt is experimented on the circuit in Fig. 1.The reactor Ls and L are coreless. The waterresistor is used as the load resistor. Substractingthe voltage drops by the thyristor and theresistance of reactor L s from the source voltage,the actual source voltage E is determined. Theexamles of wave forms of thyristor temminalvoltage and source current are shown in Fig. 764 T. FUJITSUKA, T. HIMEl and ]. WAKABAYASHI1 1'--~2-.l-~5:-'-..l...LJ,1~O--}20::--.l-~50,.-LJL..J...J,I~OO::---2~O-O--'---L~SO:-::-OLLJU10,LOO-J":W2CL§ 5. Design exatnpleNext, the design exampleusing the analyzed result, isshown. The specificationsof the circuit are determin-ed as follows, the circuitconection is as shown inFig. 1, the driving frequencyf= 360 Hz, the out-put vol-tage in full load Vo= 30V,the variation of load resi-stance R=2-20JJ.At the first, the parame-ter j = 1.5 is picked up fromFig. 5, since regulation ofthe output voltage due tothe variation of K, that is,the resistive load R, is rel-atively small. the parame-ter K is determined to 0.2-2.0, proportional to the variation of R. In thecase of j= 1.5, K=0.2, it is necessary that theturn-off time of the thyristor is shorter than38 f.lS, as shown from Fig. 4. From the relationK= YR, Y=O.l, accordingly C=44 f.lF, aredetermined. And from j = YX= 1.5, X = 15,accordingly L = 6.6 mH, are determined.Taking J~= 1.0, that is, the value which soursecurrent is not interrupted by the variation ofK, Ls =4.4 rnH is determined.The ideal characteristices of the circuit areas follows. On the full load, E=28 V is neces-sary to get Va = 30 V, since VolE = 1.06 fromFig. 5. And then Is = 16 A from Eq. (15). Onthe minimum load, Vo=32V, since Vc/ E= 1.15.And then Is = 1. 85 A. If the inductance L isinfinitive, Vo is 58 Vat the minimum load.For the practical design, it is necessary toconsider the voltage drop of the winding resi-stance Rs of the reactor Ls and the voltagedrop ESOR of the thyristor on conducting. Forexample, if ESOR = 1 (V) x 2, R = 0.1 (fJ), thepractical sourse voltage E' is E+EsOR+Rs Is= 32 (V), Vo at minimum load is (Vol E) x (E'-ESOR - Rs I.~) = 34. 3(V).The experimenntal result of the output vol-tage characteristices is shown in Fig. 9. InFig.9, the circuit characteristices without re-actor L, and those with feedback rectifiers2) andwithout reactor L, are shown in comparision.The reverse blocking times of thyristor on fullload were about 40 f.lS for every type of circuits.Js:O.75"r;''*~ I II I iI iII I !Iv:---i ....... r-.. I iV r-- 1'-,I--.. v,/IV --~ / r-0Boundary lines where is comes to be interrupted.Fig. 6Fig.8 Measured wave forms of thyristor voltageacross A-K (upper side) and source current (underside).(L, Ls: coreless reactor)Js=O'2CLs=2.0, J=",2 CL=J.5, K=OJCR=5.0,j=IOOOHz, C=7.5IlF, L=5.07mH, Ls=6.77mH,R= 10612, Is= I.OA, E=35V, Va=53V.Fig.7 Measured wave forms of thyristor voltageacross A-K (upper side) and sourse current (underside).(L, Ls: coreless reactor)Js = ",2 GLs=2.0, J=O'2 CL= 1.5, K ='" CR= 2.0,j=IOOOHz , C=7.5IlF, L=5.07mH, Ls=6.77mH,R=42.412, Is=J.3A, E=33.8V, Vo=38V.and Fig. 8. The experimental results of effec-tive capacitor voltage Vo are shown in Fig. 5by using x mark, when driving frequency j =1000 Hz, C= 7.5 f.lF. The experimental resultsare similar to the caluculated.lrCJ3II::.L1Parallel Inverter with Parallel Inductive Load 655208010 --- dftd~md. PXiunjt&--)(----X--- nritAi/nt !{Q",cbt L'f -.-.-.-~I-f.&uk~I • ea.e adorJxi 1J~" E =32 (V) 15I f =360 LHx)~60 \ C =44 (I'F)u " Ls=4.4 (mH):>14 ~'_,x __'Y~_~v6.6 (mH)...o 5 10 15- IR(A)o 5 10 15- IR(A)Fig.9 Experimental result of designed example.§ 6. Discussion1) In steady state, the initial current iL +0flowing in inductance L in every half cycle iscaluculated by a simple formula. Therefore,the steady state operation of circuit is able tobe solved by the second order simultaneousdifferential equation.2) Concerning the wave forms and the effe-ctive value of output voltage, the measuredvalue are similar to the caluculated, though,it is necessary to consider the voltage drops ofthyristors and d-c souse reactor. As to sousecurrent, the measured value is a little largerthan the caluculated. This reason is supposedto be due to the losses of the capacitor C andthe reactor 1. Therefore, it is necessary to co-nsider the efficiency of circuit elements, forbetter approximation.3) There are many cases which the transf-ormer is used in the side of the load. In thesecases, the above mentioned circuit conditionsare satisfied without the specified reactor L bymaking an air-gap in the core of transformer.§ 7. ConculusionThe parallel inverter circuit with parallelinductive load is analyzed. Consequently, byconnection of the reactor L, it is clarified thatthe voltage regulation of the inverter circuit isimproved. The design example using theanalyzed reults is shown, and the measuredresults of the design example, in which thevoltage drops of the circuit elements are comp-ensated, are to satisfy the specification.It is concluded that the configuration is ausefull type of parallel inverter circuit.ReferenceI) S. HAYASHI & others: J. 1. E. E. 71 145, 1970.2) W. MCMARRY, D. P. SHTTUCK: Communicationand Electronics 531, Nov. 1961.

Analysis and Design of Parallel Inverter Circuit with Parallel Inductive Load

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