This paper applies an improved method for testing the signal-to-noise ratio (SNR) of Analogue-to-Digital Converters (ADC). In previous work, a noisy and nonlinear pulse signal is exploited as the input stimulus to obtain the signature results of ADC. By applying a machine-learning-based approach, the dynamic parameters can be predicted by using the signature results. However, it can only estimate the SNR accurately within a certain range. In order to overcome this limitation, an improved method based on work is applied in this work. It is validated on the Labview model of a 12-bit 80 Ms/s pipelined ADC with a pulse- wave input signal of 3 LSB noise and 7-bit nonlinear rising and falling edges

Kerkhoff, Hans G.

Sheng, Xiaoqin

English

Xiaoqin Sheng

Hans G. Kerkhoff

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Improved method for SNR prediction in machine-learning-based test

University of Twente Research Information

Improved Method for SNR Prediction in Machine-Learning-Based Test Xiaoqin Sheng and Hans G. Kerkhoff CTIT-TDT Group, University of Twente, Enschede, the Netherlands {x.sheng, h.g.kerkhoff }@utwente.nl  Abstract— This paper applies an improved method for testing the signal-to-noise ratio (SNR) of Analogue-to-Digital Converters (ADC). In previous work, a noisy and nonlinear pulse signal is exploited as the input stimulus to obtain the signature results of ADC. By applying a machine-learning-based approach, the dynamic parameters can be predicted by using the signature results. However, it can only estimate the SNR accurately within a certain range. In order to overcome this limitation, an improved method based on work [1] is applied in this work. It is validated on the Labview model of a 12-bit 80 Ms/s pipelined ADC with a pulse- wave input signal of 3 LSB noise and 7-bit nonlinear rising and falling edges. Keywords: ADC, test, SNR, double-ADC, pulse wave, machine-learning-based I. INTRODUCTION  An ADC is a crucial device as interface between the analogue world and the digital world (like multi-media and communication systems). Nowadays, looking at the fast development of digital circuits, the speed and resolution of ADCs also increase quickly. As a result, it brings a great challenge to the ADC testing, which requires a high quality test instrument and a longer test time [2].  The machine-learning-based approach has proven to be very efficient for reducing the test cost for RF or mixed-signal circuits. The conventional specification testing is only carried out on a set of training devices. Signature testing is carried out on all the Devices-Under-Test (DUT), which requires a simpler test setup or consumes less test time. Finally, the prediction results of the specifications can be calculated using the signature results and the mapping function, which is built by the training data [3].  Several works have been carried out with respect to machine-learning -based testing of RF or mixed- signal circuits. In [3], the authors test a high-speed ADC with a low-frequency signal, as a high-frequency and high-quality analogue test signal for the high-speed ADC is very expensive to generate. A mixer is introduced into the test hardware to obtain the high- frequency tone by mixing two low-frequency signals. Then, a signature result can be obtained by the high-frequency tone. The multivariate adaptive regression splines (MARS) [4] is exploited to build up the mapping function between the signatures and the specifications. In this way, the dynamic specifications can be calculated via the signatures, which only require a low-frequency input signal. The authors in [5] use the machine-learning-based method for a loop-back test of an ADC and a Digital-to-Analogue Converter (DAC). It is well-known that the difficulty in loop-back test is the fault masking. In order to overcome this difficulty, they create a mapping function via the training data, which indicates the relationship among the ADC, DAC and loop-back channel. As a result, both the ADC and DAC can be tested without the external analogue-signal generator. The work in [6] uses a simple envelope detector to predict the specifications without any external expensive RF ATEs. The wavelet coefficients are the signature results for the prediction of the specifications. The MARS algorithm is also applied to map the signatures to the specification space. The method has been successfully implemented on a LNA in simulation. In our previous work [7], a machine-learning-based method is applied to predict the dynamic parameters of a 12-bit pipelined ADC. For the signature testing, a low-quality pulse wave is applied as the test stimulus and a signature result out-of-range percentage (ORP) is used to predict the specifications. However, the prediction of the SNR turns out to be not sufficiently accurate. In this paper, we first present the limitation of the previous method when estimating the SNR. Then, a method for improving the accuracy of the SNR prediction is presented.   II. MACHINE-LEARNING-BASED TESTING FOR ADC The principle of machine-learning-based method is depicted in Figure 1. A specially defined test stimulus is applied to the DUT, which can generate the signature results. As the signature is correlated with the specification, all the signature results can be mapped to the space of specification by using some certain algorithms. Usually, the MARS algorithm is selected as it can predict a dependent variable from a set of independent predictor variables with high flexibility.  DUT Signature       Specification mapping Input stimulus  Figure 1: Machine-learning – based test method In the previous machine-learning-based test method for an ADC, there are basically six steps: Step 1: A certain number of ADCs are selected as the training set. In order to improve the prediction of the results later, they should cover all the corner cases. Step 2: The specifications of the training set are measured by using a conventional ADC test setup.  Step 3: The signature testing is carried out on the training set to obtain the signature results. Step 4: A mapping function between the specifications and signatures is built by applying the multivariate adaptive regression splines (MARS) algorithm.  Step 5: The signature testing in step 3 is carried out on all the DUTs  Step 6: The predictions of the specifications of all the DUTs are calculated by substituting the signature results into the mapping function. For our signature testing approach, the test input signal is a noisy and nonlinear pulse wave. Compared with a high-quality analogue sine wave for the specification testing, it is easier and less expensive to generate. The signature ORP [7] is calculated by analyzing the output waveform in the time domain.  This machine-learning-based approach is validated via a simulation on the Labview model of a 12-bit pipelined ADC. A pulse wave of a 7-bit linear rising/falling edge and a Gaussian noise with a standard deviation σ = 3 LSB has been applied. There are 2000 training devices and 1500 DUTs in total. The simulation results are shown in Figure 2: the actual SNR of the ADCs ranges from 59 dB to 71 dB. Figure 3 shows the simulation results when the actual SNR ranges from 49 to 67 dB. The x-axis denotes the actual SNR values of these DUTs while the y-axis denotes either the actual values or the estimated SNR values.  One can observe that the estimated SNR in Figure 3 is more close to its actual value as compared with the one in Figure 2. If the error is defined as the deviation from the actual SNR value, then the mean error in Figure2 is 1.14 dB while the mean error in Figure 2 is 0.53 dB. Moreover, in Figure 3, when the SNR is larger than 62 dB, the error becomes larger. This means that with 3 LSB noise of the input signal our previous method can predict the SNR accurately if its actual value is below 62 dB. For a high-resolution ADC, of which the SNR is higher than 62 dB, our previous method can not obtain accurate predictions.  Figure 2: SNR estimation results when its actual value ranges from 59 ~ 71 dB  Figure 3: SNR estimation results when its actual value ranges from 49 ~ 67 dB III. IMPROVED TEST METHOD FOR SNR Besides the noise caused by the ADC circuitry, the output of the ADC also contains the noise of the input signal. The conventional specification testing requires the input test stimulus to be very “clean”. In this case, the output would contain more pure test data of the DUT itself. However, in the previous machine-learning-based method, a noisy pulse wave is applied as the input test signal. As the noise of input stimulus is comparable with the noise of the ADC circuitry, it becomes a considerable part in the SNR value. Consequently, it could mask the real noise caused by the DUT. This is the reason why an input pulse wave with 3 LSB noise can only predict a certain range of the SNR accurately. In order to decrease the influence of the noise from the input signal, an improved method is proposed. In [1], a two-ADC method is proposed to improve the SNR results in the conventional specification test. An analogue sine wave and the FFT analysis are required as the test stimulus and post-processing method respectively.  Based on the work in [1], it is now applied for the signature testing, which exploits a pulse wave input signal and a time domain post-processing.  In our pervious method, the output is reorganized into one single period for calculating the signature ORP [8]. Now, the output is reorganized into a double-period output waveform as the method in [1]. Then, one period waveform is subtracted from the other. In this way, the systematic error of the ADC is removed from the output (like nonlinearities and quantization errors) as it is a repeatable error. If one assumes there are two ADCs tested by the same input stimulus, named ‘ADC1’ and ‘ADC2’, their subtracted outputs can be expressed respectively as: 22121 signalADC σσσ +=     (1) 22222 signalADC σσσ +=     (2) , where σ2ADC1 and σ2ADC2 represent the variance of the noise from ADC1 and ADC2 respectively and σ2signal represents the variance of the noise induced by the input stimulus.  Subsequently, the differential output between σ21 and σ22 is then computed, which can represent as: 222123 ADCADC σσσ +=     (3) From equations (1), (2) and (3), σ2ADC1 and σ2ADC2 can be computed. They can be exploited as an additional signature to predict the SNR in our previous machine-learning-based method. In this way, the SNR can be predicted by the signature more accurately.  IV. MODEL OF DEVICE-UNDER-TEST  Figure 4: The basic architecture of the 12-bit pipelined ADC [7] An on-chip 12-bit 80 Ms/s pipelined ADC has been selected as the target device to validate the improved method, which is modeled in Labview at system-level. The pipelined ADC is a very popular choice in high-speed and high-resolution applications [9], like in video, audio and communication systems. This is because it can convert the data at high speed and high resolution with a good dynamic performance and low power consumption. The pipelined converters contain more than two conversion steps. First, a coarse conversion is carried out. Second, the difference between the input signal and coarse converted output is converted. In such a way, the input signal is converted stage by stage. After all stages have accomplished the conversion, a high-resolution output can be obtained via the combination of the output of each stage. The Labview model of the 12-bit pipelined ADC is built based on the architecture as shown in Figure 4. It consists of ten stages, whose structures are identical to each other. The basic structure of each stage is shown as the block diagram in the dash line in Figure 4. It basically contains a residue amplifier, an analogue adder, a 1.5-bit ADC and a 1.5-bit DAC. The 1.5-bit ADC is implemented by a flash ADC because only a low resolution is required. The amplifier, adder and DAC blocks are implemented by a multiplying DAC (MDAC) [10].  In order to emulate the process variation in fabrication, the independent Gaussian noise sources are added into the key parameters of the ADC model, like gain, offset, capacitance mismatch of each sub-stage.  V. SIMULATION OF THE PROPOSED METHOD A. Simulation setup In the simulation, 2000 devices are randomly generated for obtaining training data to build up the mapping function. 1500 test devices are used to evaluate the method. The reference SNR of all the devices is tested by a perfect sine wave of a sampling frequency fs=80 MHz, input frequency fin=38 MHz, and the number of samples is N=4096.   The input pulse wave for signature test has an input frequency fin=38 MHz, rising or falling time Tr and Tf = 6 ns, and a sampling frequency of fs=80 MHz is used. The number of samples is N=4096. The nonlinear feature of the rising and falling edges is modeled with 7-bit linearity following the equation below [11]: )()](*04.0[)( 2 tntttvtx os +−++= η   (5) , where η is the slope, n(t) denotes the noise  and vos denotes the offset voltage. The 7-bit nonlinearity of the signal is modeled by the part . For the noise feature of the input signal, a Gaussian white noise with a standard deviation σ = 3 LSB has been added to the pulse wave. )(*04.0 2 tt −Stage 1 Stage 2 Stage 3 Stage 10 Time alignment & Digital correction 2.5 2.5 1.5 12 2 Vin +-DAC ADC Adder    Amplifier  B. Simulation results and analysis In our previous work [7], 30 variables are selected to build up the mapping function for predicting the SNR. In the improved method, the 30 variables are still kept the same but one more variable σ2ADC is added to the mapping function as discussed in section III. The simulation result is shown in Figure 5. The x-axis denotes the actual values of the SNR tested by a perfect sine wave while the y-axis denotes the SNR values from different data series. The grey circles plot the estimated SNR in our previous work while the black dots plot the estimated SNR by the improved method. One can see that the black dots are more close to the straight line which is the reference SNR value obtained by a perfect sine wave. The original method in [7] is also applied to the 1500 test devices, which uses the sine wave as the test stimulus without using the machine-learning-based test method. The same Gaussian white noise as in the pulse wave has also been added to the input sine wave. The simulation results are shown in Figure 6. There are two data series in Figure 6: one is the reference SNR values obtained by the perfect sine wave and the other one is the SNR values obtained by a noisy sine wave. If one compares the result in Figure 5 with the one in Figure 6, the results in Figure 5 have obviously a much better accuracy.    Figure 5: SNR estimation results with original and improved machine- learning –based methods  Figure 6: SNR estimation results with original double-ADC method The mean error and outliers in both Figures 5 and 6 are listed in Table 1. One can see that the improved machine-learning – based method obtains the most accurate results.  1) Compared with the previous machine-learning –based test method, adding one more variable to the mapping function decreases the mean error by 0.12 dB and the number of outliers by 54. Obtaining the extra variable only requires additional FFT computation for post-processing. 2) Compared with the original double-ADC method, the mean error of the improved machine-learning method is 2.24 dB and the number of outliers is 460 less. With the same level of input noise, the latter method can obtain much more accurate results. The double-ADC method requires an analogue sine-wave input signal while the improved machine-learning-based method only requires adapted pulse wave.   TABLE 1: The errors and outliers of the SNR results with different methods  Mean error (dB) Number of outlier Original machine-learning- based method [6] 1.07 522 Improved machine-learning –based method 0.95 468 Double ADC method [7] 3.19 928  VI. CONCLUSIONS In this work, the limitations of our previous machine-learning-based method are presented. An input pulse wave with noise is applied as the test input signal. The SNR can be predicted accurately only when it is below a certain value. A method used before for improving conventional specification testing is then applied to our machine-learning -based method. A double-period output waveform is reorganized. By calculating the differential of the two periods output and the difference of the output between two ADCs, the noise induced by the input stimulus can be decreased at the output. The recalculated noise of the output is used as the additional variable for the previous machine-learning-based method. As result, the accuracy of the SNR prediction can be improved. In machine-learning-based testing, the more variables are correlated to the specifications the more accurate prediction results can be obtained. Compared with the original double-ADC method, this work applies a pulse wave instead of a sine wave and uses machine-learning-based method, which obtains a much better accuracy. REFERENCES [1] P. Cauvet “Improving the dynamic measurements of ADCs using the 2-ADC method”, Computer Standards & Interfaces, Volume 22, Issue 4, pp. 281 - 286, 2000. [2] M. Burns, G. W. Roberts, An Introduction to Mixed-Signal IC Test and Measurement, Oxford University Press, 2000. [3] S. Goyal, A. Chatterjee, M. Purtell “Alternate Test Methodology for High Speed A/D Converter Testing on Low Cost Tester”, IEEE Asian Test Symposium, pp. 14-17, 2005. [4] J. H. Friedman “Multivariate Adaptive Regression Splines”, The Annals of Statics, vol 19, No.1, 1-141, 1991. [5] B. Kim, H. Shin, J.-H. Chun, J.A. Abraham, “Predicting mixed-signal dynamic performance using optimised signature-based alternate test”, Computers & Digital Techniques, pp. 159-169, 2007. [6] D. Han, A. Chatterjee, “Robust Built-In Test of RF ICs Using Envelope Detectors”, IEEE Asian Test Symposium, pp. 2-7, 2005. [7] X. Sheng, V. Kerzérho, H. Kerkhoff “Predicting Dynamic Specifications of ADC with a Low-Quality Digital Input Signal”, IEEE European Test Symposium, 2010. [8] Irons, F.H., Hummels, D.M., “The modulo time plot-a useful data aquisition diagnostic tool”, Instrumentation and Measurement, pp. 734-738, 1996. [9] A. Moscovici, High Speed A/D Converters, Kluwer Academic Publishers, 2001. [10] R. Plassche, Integrated Analog-to-Digital and Digital-to-Analog Converters, Kluwer Academic Publishers, 1994. [11] L. Jin, K. Parthasarathy, T. Kuyel, D. Chen, R. L. Geiger, “Accurate Testing of Analog-to-Digital Converters Using Low Linearity Signals With Stimulus Error Identification and Removal”, IEEE Transactions of Instrumentation and Measurement, pp.1188-1199, 2005.   

NARCIS 

Accurate Testing of Analog-to-Digital Converters Using Low Linearity Signals With Stimulus Error Identification and Removal”,

An Introduction to Mixed-Signal IC Test and Measurement,

Friedman “Multivariate Adaptive Regression Splines”,

High Speed A/D Converters,

Improving the dynamic measurements of ADCs using the 2-ADC method”,

Integrated Analog-to-Digital and Digital-to-Analog Converters,

Kerkhoff “Predicting Dynamic Specifications of ADC with a Low-Quality Digital Input Signal”,

Predicting mixed-signal dynamic performance using optimised signature-based alternate test”,

Purtell “Alternate Test Methodology for High Speed A/D Converter Testing on Low Cost Tester”,

Robust Built-In Test of RF ICs Using Envelope Detectors”,

The modulo time plot-a useful data aquisition diagnostic tool”,

https://doi.org/10.1109/IMS3TW.2010.5503007

Improved method for SNR prediction in machine-learning-based test

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