Bauwelinck, Johan

Torfs, Guy

Vandewege, Jan

English

Ghent University Academic Bibliography

Integrated Subblocks for RF Ranging ApplicationsGuy TorfsSupervisor(s): Jan Vandewege, Johan BauwelinckI. INTRODUCTIONScaled chip technologies made it possibleto integrate high speed applications in portabledevices. A large subset of these devices are sit-uated into the area of sensor networks, whichwould benefit from location information. Lo-cation aware devices such as [1] require abandwidth of at least 250MHz to perform anaccurate time-of-arrival ranging. The ultra-wide band pulse based radio sends a signalwith a fast risetime which makes it possible todetect the arrival of the signal within a range of3ns, giving a resolution of less than 1m. To in-crease the integration and thus reduce the costand the power consumption, specific buildingblocks should be developed. A low powerbaseband filter and flash analog-to-digital con-verter (ADC) required for ranging are devel-oped and discussed here, this with the accenton ranging applications.II. BASEBAND FILTERThe RF ranging signal situated around2.45GHz is received and downconverted. Thehuge bandwidth of the ranging signal makesit necessary to have a wide baseband path(125MHz). The main challenge, for accu-rate reception, is the presence of strong UMTStransmitters close to the signal of interest. Toremove the interference a very linear high or-der filter is necessary. This is implemented asin [2], but with some extra linearity improve-ments. This resulted in a very low power so-lution with a figure of merit being 3dB higher—————————————————–G. Torfs is with the Department of InformationTechnology, Ghent University Belgium. E-mail:Guy.Torfs@intec.UGent.bethan the state-of-the-art.III. LOW-POWER 4-BIT ADCTo digitize the ranging signal a low resolu-tion ADC is sufficient, but due to the broad-band nature of the signal a high sampling speedis needed. A flash ADC is the most promisingapproach in such situations. A common prob-lem in flash ADCs is kickback noise, chargethat is pushed back to the input which givesa memory effect to the different comparators.To reduce this, a novel technique was proposed[3]. This kind of comparator is implementedand tested in a 4-bit ADC and resulted in animproved figure of merit compared to deviceswith a similar speed and technology node.IV. CONCLUSIONSTwo state-of-the-art building blocks weredeveloped and described. A low power base-band filter with improved linearity outpassesthe best figure of merit reported by 3dB. Nextto this filter, a high speed low power ADC isproposed which outperforms devices with sim-ilar speed in a comparable technology node.Ongoing research targets the integration of thefull receiver chain.REFERENCES[1] X. Yin, et al, Embedded ranging in ISM band,IET Electronics Letters, Vol. 44, Nr. 17, August2008, pp. 1043-1045.[2] S. D’Amico, et al, A 4.1-mW 10-MHz Fourth-Order Source-Follower-Based Continuous-TimeFilter with 79-dB DR, IEEE JSSC, Vol. 41, Nr.12, December 2006, pp. 2713-2719.[3] G. Torfs, et al, A low-power reduced kick-backcomparator with improved calibration for high-speed flash ADCs, IEICE Transactions on Elec-tronics., Vol. E92-C, Nr. 10, October 2009, pp.1328-1330.

Integrated subblocks for RF ranging applications

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Integrated subblocks for RF ranging applications

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Ghent University Academic Bibliography