Hoffmann, J.

Kurz, N.

Minami, S.

Ott, W.

Voltz, S.

GSI Repository

Development of a FPGA based PCI-express to optical link interface card,KINPEXS. Minami∗, J. Hoffmann, N. Kurz, W. Ott, and S. VoltzGSI, Darmstadt, GermanyA new PCI-express (PCIe) to optical link interface card,KINPEX, has been designed and produced to replace a cur-rent PCIe card, PEXOR[1]. It provides high speed datatransfer from front-end cards to standard personal com-puters (PC) to support experiments with high data rates atFAIR. Both cards are equipped with a high performanceFPGA to control the whole system, a four-lane PCIe busand four small form-factor pluggable (SFP) transceivers.For the KINPEX card, we have adapted Kintex-7 FPGAfrom Xilinx corp. for price-performance reason, whileSCM40 FPGA from Lattice Semiconductor corp. was cho-sen for the PEXOR card at 2008. Detailed hardware speci-fication is available from the reference [2].Figure 1: KINPEX, a PCIe to optical link interface card.The new FPGA firmware to operate the KINPEX cardhas been developed. It supports data exchange with a PCvia PCIe bus, which is realized with the serial interconnectbuilding block of the FPGA configured by an intellectualproperty (IP) core from the manufacturer. It is configuredwith a per lane data rate of 2.5 GT/s to be compatible withPEXOR. The IP core supports the physical, data link, andtransaction layers of PCIe protocol and gives an exampleto process transaction layer packets (TLPs). The examplewas modified to perform 32-bit memory read/write accessto control registers and four 256 KByte dual-port memories(DPMs) prepared for storage of data from SFPs. For themaximum data throughput, the DMA engine developed forPEXOR is utilized for KINPEX [1]. It provides maximumpayload size of 128 bytes and performs two modes of datatransfer. One transfer mode waits arrival of complete datato the DPMs from SFPs, before it sends data to the PC fromeach DPM in sequence. The other transfer mode is able toactivate only one of the four SFPs, however it performs∗ s.minami@gsi.deDMA data transfer via a FIFO memory as soon as storeddata reaches payload size of 128 bytes.SFPRXTXSFPRXSFPRXTXPCIe CardKINPEXTXSFPRXSFPRXTXSFPRXTXFront-End CardSFPRXTXSFPRXTXFront-End CardSFPRXTXSFPRXTXFront-End CardSFPRXTXSFPRXTXFront-End CardSFPRXTXSFPRXTXFront-End CardSFPRXTXSFPRXTXFront-End CardSFPRXTXSFPRXTXFront-End CardSFPRXTXSFPRXTXFront-End CardUpstreamDownstreamSFPRXTXSFPRXTXFront-End CardLC Duplex Fibre Optic CableFigure 2: Connection of the PCIe card and the front-endcards.The firmware supports communication with front-endcards via SFPs with GOSIP (gigabit optical serial inter-face protocol)[3]. It is a master and slave protocol withtwo modes of data transfer, address and block mode, andthe main feature is that one SFP port of master is capa-ble to control multiple slaves equipped with 2 SFPs. Thefront-end cards (slaves) can be chained in a way that oneSFP of the front-end card upstream can be connected withthe other SFP of the one downstream as shown in figure 2.Payload of data is kept as 1.6Gbps per SFP as PEXOR is.The standard data acquisition (DAQ) system at GSI,Multi-Branch System (MBS) [4], has been upgraded tosupport the KINPEX cards and the system with the KIN-PEX card is working stable with expected performance.References[1] J. Hoffmann et al. GSI Scientific Report 2008, p275[2] https://www.gsi.de/fileadmin/EE/Module/Dokumente/kinpex1 pcb15.pdf[3] S. Minami et al. IEEE Trans. Nucl. Sci., vol. 58, no. 4, pp.1816-1819, Aug. 2011[4] H.G. Essel and N. Kurz, IEEE Trans. Nucl. Sci., vol. 47, no.2, pp. 337-339, Apr. 2000FG-CS-02 GSI SCIENTIFIC REPORT 2013372 doi:10.15120/GR-2014-1-FG-CS-02

Development of a FPGA based PCI-express to optical link interface card, KINPEX

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Development of a FPGA based PCI-express to optical link interface card, KINPEX

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