International audienceThis work aims at describing the main features of a system, the so-called THESIC tester, devoted to the functional validation of integrated circuits. This system, initially designed to set-up radiation test experiments of digital architectures, is composed of two main blocs: a motherboard for the interface with the user and the control of the circuit under test operation and a daughter board in which is implemented a suitable architecture around the circuit to be tested. The THESIC version presented in this paper was enhanced in order to significantly simplify the daughter board developments, whose architecture is implemented through an FPGA programmin
