Spectrum monitor for cognitive radio

Abstract

The concept of a cognitive radio assumes that the receiver is able to determine the activity level across a large range of spectrum in order to assign a channel for its use. Hence a key function is a spectrum monitor to detect the spectrum availability as a first step. This thesis explores the requirements and design issues for the spectrum monitor receiver. The main challenge of this receiver design is to draw a spectrum map covering a wide range of frequency that is fast and accurate enough while consuming low power compared with the main transceiver circuits. The history and applications of the concept of cognitive radio (CR) are overviewed, followed by a wideband receiver architecture review, giving a wide range of scheme options for the proposed spectrum monitor. The concept of figure of merit (FoM) is then introduced. This concept helps to predict the performances versus power consumptions for active components over the next few years. By exploring the trend and relationship among FoMs, performances and time scales, a design approach is obtained to be used as a guide for system level receiver budget design. Then the spectrum monitor architecture is explored depending on the application and the figures of merits. For a representative cognitive radio application it is shown that the dual-down conversion architecture is suitable for the spectrum monitor, and the system specifications are given. Using these system specifications, the circuit level design of two of the key blocks is explored, where the requirements are significantly different from conventional designs reported in literature. A wide tuning range ring oscillator based PLL that is suitable for the frequency conversion and tuning functions is designed, fabricated and tested. A design method for high frequency on-chip bandpass filters is presented and experimentally tested. Comments on this research and future works are finally discussed