Presentation made at LEB99, 20-24 September 1999A novel compact detector module has been produced by the "IReS"-"Subatech"-"Thomson-CSF-Detexis" collaboration. It includes a Double-Sided (DS) Silicon Strip Detector (SSD) and the related Front End Electronics (FEE) located on two hybrids, one for the N side and one for the P side. Bumpless Tape Automated Bonding (TAB) is used to connect the detector to the hybrids by means of microcables with neither wirebonding nor pitch adapter. Each of the six dedicated ALICE128C FE chip [1], located on the hybrid, is TABed on identical single layer microcables, which connect its inputs to the DS SSD and its outputs to the hybrid [2]. These microcables are bent in order to fold over the two hybrids on the DS SSD. This module meets the specifications of two experiments, ALICE (A Large Ion Collider Experiment) on the LHC accelerator at CERN [3] and STAR (Solenoid Tracker At Rhic) on the RHIC accelerator at BNL (Brookhaven National Laboratory)[4]. It can be used with air cooling (STAR) as well as with water cooling (ALICE)[5]. This mechanically self-consistent FE module has been tested on the SPS beam at CERN. Preliminary results are presented

Arnold, L

Baudot, J

Berst, D

Bonnet, D

Boucham, A

Bouvier, S

Castillo, J

Clauss, G

Coffin, J P

Colledani, C

Drancourt, C

Dulinski, W

Erazmus, B

Germain, M

Gojak, C

Guilloux, G

Jundt, F

Kühn, C E

Lutz, Jean Robert

Martin, L

Roy, C

Suire, C

Tarchini, A

Lutz, J.R.

Arnold, L.

Baudot, J.

Bonnet, D.

Coffin, J.P.

Germain, Marie

Gojak, C.

Jundt, F.

Kuhn, C.

Suire, C.

Tarchini, A.

Berst, J.D.

Clauss, G.

Colledani, C.

Dulinski, W.

Boucham, A.

Bouvier, S.

Castillo, J.

Drancourt, C.

Erazmus, B.

Guilloux, G.

Martin, Lilian

Roy, C.

HAL Descartes

Tab bonded SSD module for the STAR and ALICE trackers

HAL Mines Nantes

HAL-Univ-Nantes

Hal-Diderot

HAL-IN2P3

CERN Document Server

TAB BONDED SSD MODULE FOR THE STAR AND ALICE TRACKERSJ.R. Lutz*, L. Arnold, J. Baudot, D. Bonnet,J.P. Coffin, M. Germain, C. Gojak, F. Jundt, C. Kuhn, C. Suire, A. TarchiniInstitut de Recherches Subatomiques - IReS - IN2P3/ CNRS - ULPBP28, F 67037 Strasbourg Cedex 02 - FranceD. Berst, G. Clauss, C. Colledani, W. DulinskiLaboratoire d’Electronique et de Physique des Systèmes Instrumentaux LEPSI - IN2P3/CNRS - ULPBP28, F 67037 Strasbourg Cedex 02 - FranceA. Boucham, S. Bouvier, J. Castillo, C. Drancourt, B. Erazmus, G. Guilloux, L. Martin, C. RoyLaboratoire de Physique Subatomique et des Technologies Associées SUBATECHBP20722, F 44307 Nantes Cedex 03 – Franceand the STAR collaboration, and the ALICE collaboration*J.R. Lutz, IReS, Strasbourg, France (email: Jean-Robert.Lutz@ires.in2p3.fr)AbstractA novel compact detector module has been produced bythe “IReS”-“Subatech”-“Thomson-CSF-Detexis” collabo-ration. It includes a Double-Sided (DS) Silicon StripDetector (SSD) and the related Front End Electronics(FEE) located on two hybrids, one for the N side and onefor the P side. Bumpless Tape Automated Bonding (TAB)is used to connect the detector to the hybrids by means ofmicrocables with neither wirebonding nor pitch adapter.Each of the six dedicated ALICE128C FE chip [1], locatedon the hybrid, is TABed on identical single layermicrocables, which connect its inputs to the DS SSD andits outputs to the hybrid [2]. These microcables are bentin order to fold over the two hybrids on the DS SSD.This module meets the specifications of two experiments,ALICE (A Large Ion Collider Experiment) on the LHCaccelerator at CERN [3] and STAR (Solenoid Tracker AtRhic) on the RHIC accelerator at BNL (BrookhavenNational Laboratory) [4]. It can be used with air cooling(STAR) as well as with water cooling (ALICE) [5]. Thismechanically self-consistent FE module has been testedon the SPS beam at CERN. Preliminary results arepresented.1. INTRODUCTIONDuring the summer 1998, a prototype module,including a DS SSD (according to the ALICE ITS InnerTracking System and STAR SVT Silicon Vertex Trackerspecifications) and two sets of ALICE128C FE chips,was tested on the SPS and PS accelerators at CERN andon the Vivitron at IReS. Two talks presented at Romeduring LEB98 provided extensive information on theALICE128C chip [6] and on the test results [7].Complementary documents have also been produced [8].These tests revealed an operation meeting all thespecifications of the Technical Proposals (TP), themechanical aspect excepted. Actually, the integration ofthis prototype on the ladders was impossible because ofits size as well as of its flat layout imposed mainly by thewire bonding connecting the chips to the detector via thepitch adapter. So, based on the same components, acompact detector module using TAB technology has nowbeen produced to fit the geometrical ladder hermeticityrequirements and the different cooling options of STARand ALICE.2. DOUBLE SIDED SSD MODULEFig. 1: Detector module in full sizeThe module consists of the mechanically self-consistentDS SSD and FEE hybrid assembly. Figure 1 representsthis module in top view i.e. from the hybrid side.One can see the detector's N side through the gapbetween the two hybrids folded over the detectors. Onehybrid is connected to the detector's N side facing thehybrids whereas the other hybrid is connected to the backon P side. On each hybrid, the three lower FE chips havetheir input microcables back-folded from the chip in orderto lower the coupling with the input amplifiers. Two thinAl pins on each hybrid will allow the mechanicalfastening and heat connection of the module onto theladder. The outside frame holds mechanically the moduleinto the spectrometer used for the beam tests. This "credit-card-like" module has the size of the detector and athickness of about 4 mm.320 such modules are needed for STAR and 1770 forALICE.2.1  DetectorThe 75 ×  42 ×   0.3 mm DS SSD includes 768 ACcoupled strips on each side with a pitch of 95µm at astereoscopic angle of ± 17.5 mrad. Guard and bias ringsare all together ≤ 1 mm wide.2.2  Front End Electronics• The FEE is located on two separate but identicalhybrids, one connected to the N and one to the P sideof the detector.• The component side of the two hybrids faces the sameorientation.• At least one of the hybrids is electrically floating.• Hybrids are double-sided printed circuits made of50 µm thick Kapton with 17 µm Cu, Ni and Auplated, on top.• One COSTAR multipurpose control chip is located oneach hybrid for temperature, low and high voltage andleakage current monitoring, and also for theALICE128C analog output offset compensation.3. TAPE AUTOMATED BONDING3.1 ManufacturersTwo French companies, Bull and Dassault have firstdeveloped the bumpless Tape Automated Bonding in ajoint EuroTAB project. Meanwhile the TAB departmentof Dassault migrated to Thomson under the nameThomson-CSF-Detexis. These companies which lead thismarket in France have a great expertise in TAB for theconsumer market as well as for air, space and militaryhigh level applications. They provide the microcables, theTAB, the bending and the assembling of the module.3.2 MicrocablesThey are produced on long tapes as in figure 2. Eachsingle frame is cut away and fixed into a plastic frameholder for easy handling and labeling as presented infigure 3, seen from the metal side. The blackALICE128C FE chip is then TABed upside down near themiddle of the microcable.Fig. 2: Microcable tape in full size.Fig. 3: Magnified Microcable in its frame   with TABed FE chip on top.The outer part, including the test pads, will be removedafter testing. The inputs on the left side will then beTABed onto the detector and the outputs on the right sideonto the hybrid.The microcables have the following characteristics.• One layer only.• One identical layout for all the FE chips.• One unique cable for inputs and outputs.• Two TABing steps are implemented:- Inside Lead Bonding (ILB) for testing and- Outside Lead Bonding (OLB) for assembling.• A so-called “UIIU” ILB input topology to meet the44 µm input pitch of the chip by splitting the TABson two staggered rows having an 88 µm pitch each.• 135 µm ILB output pitch.• 95 µm OLB detector pitch.• 240 µm OLB hybrid pitch.• Thickness: 17 µm Cu, Au layered, on top of 70 µmKapton.• Kapton is removed on bonding locations.• Kapton is also removed on bending locations in orderto avoid mechanical stress on the metal at the bendingarea.• TABing is possible from both sides of themicrocables, allowing for the components on thehybrids to face any appropriate side of the detector.• There is no lost channel between 2 neighboringmicrocables.The standard industrial Cu cables have been usedbecause they proved their mechanical and electricalruggedness and reliability on various applications.Use of Al cables of same geometry is presentlyinvestigated.3.3 Test featuresFrom the early project step, this FE module has beendesigned for being tested all along its manufacturing,assembling and operating [9]. Everything can be remotelyset, tuned, tested, checked and monitored at each step [10].This convenience dictates all the steps of assembly of theDS SSD module.3.4 Steps of TABing and assembling•   ILB    TAB   . Each FE chip is first TABed on its uniquesingle layer microcable (Figure 4), with test padsextensions, fixed inside its plastic frame holder(Figure 3).Fig. 4: X shaped TABs on the right side ofthe ALICE128C FE chip.•     Chip   test  . The frame with its test pads is plugged on atest socket for chip and ILB checking. This test,running on a laptop PC with LabView software, isinterfaced by a National Instrument digital an analogI/O PCMCIA card and a compact JTAG moduleplugged on the printer port. It displays, in real time,the progress of the tests and produces an output file ofthe measurements corresponding to the data sheet.•    Extension   removal  . After completion of the tests, thesurrounding test pads are removed with the associatedplastic frame holder.•     OLB      hybrid      TAB   . The remaining part of themicrocable, inside the dotted area on figure 3, is thenprocessed. The output side of this assembly is doublefolded in order to bring the microcable next to thehybrid surface and TABed onto the pads of the hybridwhich has already been equipped before with about 50passive components and one COSTAR chip. Six FEALICE128C chips on their microcable are TABed oneach hybrid in this way.•     Hybrid    test  . The full-equipped hybrid is then testedwith the same equipment as the single chip, but via aflex cable connector which plugs on the connectiontowards the ladder end.•     OLB    SSD    TAB   . The remaining free input side is thenflat positioned onto the SSD pads and TABed onthem.•    Location    of    SSD    TAB   . One hybrid is connected to oneend of the SSD P side, the metal layer of themicrocable facing the SSD, whereas the second hybridis connected to the opposite end of the SSD N side,the Kapton of the microcable facing the SSD(Figure 5 top).•    Folding    for     air-cooling   . The two hybrids are foldedover the N side of the detector with their componentslooking outside the module for air-cooling (Figure 5,middle and bottom view).Fig. 5: Assembling•    Folding   for     water-cooling.  The hybrids can be foldedover the detector with their components inside, facingthe detector. They show then a flat surface appropriatefor water cooling by means of a heat-bridge.•    Stiffening    spacers   . The detector is fixed on the hybridsby means of 100 µm thick carbon-fiber-epoxystiffening spacers glued on the backside of eachhybrid. A thin side extension protects the edge of thedetector from mechanical shocks. (Figure 5, bottom).•    Ladder   tightening     pins   . Each spacer is equipped withtwo pins to fix and to cool the module onto the ladder.•    Plan    position    on   the   ladder  . The modules can be placedjointly on the ladder next to each other because of thethin microcables feeding all the signals on one face ina 100 µm space. They present their insulated Kaptonface to the outside. Thus they can be assembled ontothe ladder on a single plane with a minimum of deadarea (STAR)•    Tile     position     on    the    ladder  . The modules can alsooverlap like tiles for a perfect hermeticity but with ahigher material budget and a more complex geometrictuning (ALICE).4. RADIATION LENGTHAvailable computations on the radiation length of awhole silicon strip layer tend to a X/X0 of 0,7 – 1%.X0 Cu = 14.3 mm leads to a X/X0 of 0.12% for auniform 17 µm thick Cu layer. This value must beweighted by the surface ratio which is about 0.25. So, themean value of X/X0 gets down to 0.03% which representsa weak fraction of the total radiation length for the layer.We consider that this value is acceptable, especially whenair-cooling is used (STAR option) which reduces thematerial budget.5. ALUMINIUM CABLESThe use of Al cables has been investigated by theUtrecht-Kharkov collaboration for the ALICE experiment[11]. These cables have a 14 µm Al layer on top of12 µm Kapton.After having investigated different topological options,multilayer multicable input, separate input and output,the collaboration finally adopted the same topological“UIIU” input option, the single layer option, thegrouping of input and output on a unique microcable andthe addition of test pads. The collaboration keptnevertheless a different input microcable layout for thedifferent FEE chips, depending on their location on thehybrid.6. BEAM TESTSThe beam tests of different samples of the describedmodule started on 15 September 1999 on the SPS atCERN and they are going on. The modules providedimmediately coherent measurements.6.1  Beam test setupIn the background of the real STAR experiment, thebeam tests have been performed with a setup as close aspossible to the real experiment operation mode, with thereal hardware, crates, boards, power supplies, cable length,locations and distances.The Device Under Test (DUT) i.e. the DS SSD module islocated in the center of a high-resolution spectrometerprovided by the LEPSI [12], (Figure 6).Due to the peculiar geometric relationship between theSSD strips and the readout channels, a lookup table hasbeen implemented in the DAQ in order to provide realisticreal time display of the acquisition data.Fig. 6: Beam test setup.The DAQ system using a MicroDAS program on OS9Operating System (OS) is running on a VME processorlocated in the crate housing the hardware interfaces.Another VME crate, running VxWorks, houses theCAENnet interface for driving and monitoring the powersupplies and the JTAG interface for the detector and slowcontrol.An Ethernet connected SUN workstation, runningSolaris OS, operates the higher level control on the VMEVxWorks crate and operator interface (later GUI GraphicUser Interface).6.2  ResultsThe baseline for the results is given by themeasurements presented in LEB98 [7]. The analysis of thepresently acquired data is going on and the plots onfigures 7 and 8 are consistent with the results provided bythe previous large size wire-bonded prototypes.Fig. 7: S/N (Signal/Noise) side P and N.The preliminary S/N plots of figure 7 present a peakvalue of about 50 on the P side and about 22 on the NPRELIMINARYside. This latter low N side value is strongly dependent onthe SSD sensor characteristics.A spare prototype SSD remaining from the 1998 runshas been used for this module. Production SSD shouldimprove this parameter.Fig. 8: Charge matching between side P and N.Figure 8 presents the charge matching characteristics ofthe module together with the spread of this value that isimportant for ambiguous multi-hit resolution.The geometric resolution perpendicular to the stripsprovides a RMS value of 22.5 micron on the P side and21.4 micron on the N side of the module.7. CONCLUSIONThese preliminary beam test results, based on a lowstatistic, are consistent with those presented earlier andprovided by an older wire-bonded prototype assembledwith the same components. Deeper investigations aregoing on for the extensive specification.It has nevertheless been demonstrated now that this newTABed DS SSD module exists, that it works and that itmeets the electrical, mechanical and cooling specificationsof both the STAR tracker and the ALICE tracker.This module uses safe and reliable options: separate butidentical hybrids for ground level and for high voltageFEE, and single layer microcables which are identical forall the FE chips.Though each module has about 3800 TABs, nodefective connection has been observed up to now.Its compact and monolithic design forming a single75 ×  42 ×   4 mm module ensures an easy assemblingon the ladders to form the detector barrels.ACKNOWLEDGEMENTWe are greatly indebted to the Thomson-CSF-Detexiscompany and especially to A. Dravet, Y. LeGoff,E. Duriez, J. Pucci and Mr. Meriac for their highlyeffective contribution in this technical development.REFERENCES[1] L. Hébrard et al., “ALICE128C: A CMOS FullCustom ASIC for the Readout of Silicon Strip Detectorsin the ALICE Experiment ”, Proc. of the third workshopon electronics for LHC experiments, Imperial College,London, September 22-26, 1997, pp. 173-177 [2] S. Bouvier et al., “ TAB packaging technology forthe Si-strip front end detector assembly ”, Proc. of the 4thworkshop on electronics for LHC experiments, Rome,September 21-25, 1998[3] “ALICE: Technical Proposal for A Large Ion ColliderExperiment at the CERN LHC ”, CERN/LHCC/95-71,LHCC/P3, December 1995[4] “Proposal for a Silicon Strip Detector for STAR”,SUBATECH, IReS, LEPSI, France, Wayne StateUniversity, USA, 1998[5] “ALICE ITS Technical Design Report”,CERN/LHCC 99-12[6] L. Hébrard et al., “Electrical characterization ofALICE128C: a low-power CMOS ASIC for the readoutof Silicon Strip Detectors”, CERN/LHCC/98-36,Proceedings of the 4th workshop on electronics for LHCexperiments, Rome, September 21-25, 1998[7] J.R. Lutz et al., “Detector and front end electronics forALICE and STAR silicon strip layers”,CERN/LHCC/98-36, Proceedings of the 4th workshop onelectronics for LHC experiments, Rome, September 1998[8] M. Germain et al., “Irradiation of a Silicon StripDetector and readout chips for the ALICE experiment atLHC”, NIM A 434 (1999) 345.[9] L. Hébrard, J.P. Blondé, C. Colledani, G. Clauss,“Design and Test of a CMOS Low-Power Mixed-Analog/Digital ASIC for Radiation Detector ReadoutFront Ends ”, Proc. of the 11th Annual IEEE InternationalASIC Conference, ASIC’98, Rochester, New York,September 13-16, 1998[10] H. Bleeker, P. Van den Eijnden and F. De Jong,“ BOUNDARY SCAN TEST - A Practical Approach ”,Kluwer Academic Publishers, 1993[11] A.P. de Haas, A. van den Brick, P. Kuijer,C.J. Oskamp NIKHEF, Utrecht, V.N. Borshchov,S.K. Kiprich, V.M. Ruzhitsky SRTIIM, Kharkov”Very low mass microcables for the ALICE silicon stripdetector” Proceedings of LEB99, 1999.[12] C. Colledani, W. Dulinski, R. Turchetta, F. Djama,A. Rudge, P. Weilhammer, “ A submicron precisionsilicon telescope for beam test purpose ”, NIM A 372(1996) 379-384.PRELIMINARY

TAB Bonded SSD Module for the STAR and ALICE Trackers

TAB Bonded SSD Module for the STAR and ALICE Trackers

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