We investigate the performance of gate-defined devices fabricated on high
mobility InAs metamorphic heterostructures. We find that heterostructures
capped with In0.75Ga0.25As often show signs of parallel conduction
due to proximity of their surface Fermi level to the conduction band minimum.
Here, we introduce a technique that can be used to estimate the density of this
surface charge that involves cool-downs from room temperature under gate bias.
We have been able to remove the parallel conduction under high positive bias,
but achieving full depletion has proven difficult. We find that by using
In0.75Al0.25As as the barrier without an In0.75Ga0.25As
capping, a drastic reduction in parallel conduction can be achieved. Our
studies show that this does not change the transport properties of the quantum
well significantly. We achieved full depletion in InAlAs capped
heterostructures with non-hysteretic gating response suitable for fabrication
of gate-defined mesoscopic devices