High Performance DiffServ Mechanism for Routers and Switches: Packet Arrival Rate based Queue Management for Class Based Scheduling

Abstract

This paper introduces a technique for applying packet arrival rate based queue management to class based scheduling algorithms. This enables a DiffServ architecture with very low packet latency, loss, and high link utilisation. Simulation results demonstrate that the proposed technique outperforms the current weighted random early drop (WRED) and weighted fair queue (WFQ) architecture