5,873 research outputs found

    On the terms violating the custodial symmetry in multi-Higgs-doublet models

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    We prove that a generic multi-Higgs-doublet model (NHDM) generally must contain terms in the potential that violate the custodial symmetry. This is done by showing that the O(4) violating terms of the NHDM potential cannot be excluded by imposing a symmetry on the NHDM Lagrangian. Hence we expect higher-order corrections to necessarily introduce such terms. We also note, in the case of custodially symmetric Higgs-quark couplings, that vacuum alignment will lead to up-down mass degeneration; this is not true if the vacua are not aligned.Comment: 16 pages, 1 figure. Title and abstract are modified, conclusions remain the same. Section on Yukawa couplings is extended. Published versio

    Implementing a Time Management Unit for the OR1200 Processor.

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    This thesis presents a Time Management Unit (TMU) that provides assistance to the scheduler and the interrupt handling of a real-time operation system. The unit provides functionality for monitoring task execution time and a mechanism for signalling when a task depletes its resources. This applies to both regular tasks and the handling of sporadic events. By putting the TMU inside a processor core, it has a more predictable impact on the overhead related to task switching. The implemented TMU is tested as a stand-alone unit with a hardware testbench, and then integrated into the OpenRISC 1000 based OR1200 processor as special purpose registers. The behaviour of OR1200 is verified through hardware simulation, using compiled software as input. The Or1ksim instruction-set simulator is modified to include the TMU functionality, which provides a reference point for the behaviour of the altered processor. The real-time operating system FreeRTOS is adapted to utilize the functionality of the TMU. Its behaviour is verified through simulation on Or1ksim, simulated hardware and execution on a Cyclone V FPGA. Analysis of runtime statistics shows that the module is working as expected through all phases of verification, and that it can increase determinism, reliability and user control. Tests have shown that the TMU is able to recover a faulting task from spin-locks and aid in fail-soft operations for software faults. By placing the TMU inside the processor core, a fixed overhead of 131 cycles is achieved during a context switch when no caches are used

    Fabrication and Electronic Investigation of GaAs nanowire/Graphene Hybrid Devices

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    In the present study, a process for fabricating GaAs nanowire/graphene hybrid devices using electron beam lithography processing techniques is presented and demonstrated. Fabricated devices were investigated electronically by measuring emph{I-V} characteristics under a variable gate voltage.Fabrication processes for both exfoliated and CVD-grown graphene were developed. For exfoliated graphene the outlined process is unsuccessful, as the graphene flakes were found to crumble and fall off during the first processing step following transfer. It is thus concluded that exfoliated graphene flakes are too delicate to perform any significant processing after graphene transfer.The fabrication process was successfully demonstrated in fabrication of devices with CVD-grown graphene. However, nanowires in these devices were seen to undergo significant corrosion during the process, which is credited to the water exposure associated with graphene transfer. This was found to be an especially prominent issue for contacted nanowires, where the metal contact is believed to facilitate galvanic corrosion. I-V characteristics and gate voltage dependence were measured for GaAs nanowire/graphene hybrid devices made with CVD-grown graphene. Large variations in the I-V behavior and gate voltage dependence was observed. This is credited to corrosion in the nanowires, which is thought to result in uncharacteristic behavior for metal-GaAs contacts. There are also indications that several devices are shortened by graphene. The electronic investigations are therefore found to be inconclusive in respect to the electronic properties of the graphene/GaAs nanowire junction. It is concluded that further developments in the fabrication process are needed to achieve GaAs nanowire/graphene hybrid devices suitable for detailed analysis

    Mission Event Planning & Error-Recovery for CubeSat Applications

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    NTNU Test Satellite (NUTS) is a student-built double CubeSat with a scheduled launch in 2015. The project is multidisciplinary where students from all specialities can apply both for thesis assignments and volunteer work. The satellite will be in a low earth orbit (LEO) where radiation creates a challenging environment for electronics and on-board systems. To counter the effects of space radiation, a thorough and detailed mission event plan, as well as battery estimation and methods for removing lasting faults have been evaluated and implemented.Two watchdog solutions have been suggested, a global watchdog with triple modular redundancy (TMR) on the backplane and a solution with a local watchdog on each master module. Both solutions have the capability to remove single event latchups (SEL) by temporarily removing power to the affected module. Based on results and analysis, the solution with two local watchdogs are the preferred solution due to the increased complexity of the TMR solution. Furthermore, the voter necessary in a TMR implementation is a single point of failure which if malfunctioning, will leave the satellite unresponsive. Guidelines for choosing a new watchdog system's parameters are given. This includes the watchdog's time-out period, power-on-reset (POR) delay and a threshold voltage for the voltage supervisory function.Mission event plans are proposed for initial power-up, in-orbit power monitoring, payload verification and satellite self-tests. A flowchart defining a software watchdog responsible for maintaining an operational satellite is also presented.An adjustable beacon rate enables power conservation by defining three different transmission rates; low, normal and full rate. For the full rate, the power consumption is estimated to 2200 mW, 233.33 % higher than in low rate and 100 % higher than normal rate. A battery management framework has been proposed in order to avoid a low battery condition

    System training and assessment in simultaneous proportional myoelectric prosthesis control

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    Background Pattern recognition control of prosthetic hands take inputs from one or more myoelectric sensors and controls one or more degrees of freedom. However, most systems created allow only sequential control of one motion class at a time. Additionally, only recently have researchers demonstrated proportional myoelectric control in such systems, an option that is believed to make fine control easier for the user. Recent developments suggest improved reliability if the user follows a so-called prosthesis guided training (PGT) scheme. Methods In this study, a system for simultaneous proportional myoelectric control has been developed for a hand prosthesis with two motor functions (hand open/close, and wrist pro-/supination). The prosthesis has been used with a prosthesis socket equivalent designed for normally-limbed subjects. An extended version of PGT was developed for use with proportional control. The control system’s performance was tested for two subjects in the Clothespin Relocation Task and the Southampton Hand Assessment Procedure (SHAP). Simultaneous proportional control was compared with three other control strategies implemented on the same prosthesis: mutex proportional control (the same system but with simultaneous control disabled), mutex on-off control, and a more traditional, sequential proportional control system with co-contractions for state switching. Results The practical tests indicate that the simultaneous proportional control strategy and the two mutex-based pattern recognition strategies performed equally well, and superiorly to the more traditional sequential strategy according to the chosen outcome measures. Conclusions This is the first simultaneous proportional myoelectric control system demonstrated on a prosthesis affixed to the forearm of a subject. The study illustrates that PGT is a promising system training method for proportional control. Due to the limited number of subjects in this study, no definite conclusions can be drawn

    Exploring the Potential for Increased Production from the Wave Energy Converter Lifesaver by Reactive Control

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    Fred Olsen is currently testing their latest wave energy converter (WEC), Lifesaver, outside of Falmouth Bay in England, preparing it for commercial operation at the Wavehub test site. Previous studies, mostly focusing on hydrodynamics and peak to average power reduction, have shown that this device has potential for increased power extraction using reactive control. This article extends those analyses, adding a detailed model of the all-electric power take-off (PTO) system, consisting of a permanent magnet synchronous generator, inverter and DC-link. Time domain simulations are performed to evaluate the PTO capabilities of the modeled WEC. However, when tuned towards reactive control, the generator losses become large, giving a very low overall system efficiency. Optimal control with respect to electrical output power is found to occur with low added mass, and when compared to pure passive loading, a 1% increase in annual energy production is estimated. The main factor reducing the effect of reactive control is found to be the minimum load-force constraint of the device. These results suggest that the Lifesaver has limited potential for increased production by reactive control. This analysis is nevertheless valuable, as it demonstrates how a wave-to-wire model can be used for investigation of PTO potential, annual energy production estimations and evaluations of different control techniques for a given WEC device

    Ultra-Low Voltage SRAM in 130nm CMOS Process

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    This thesis explores the viability of implementing a ultra-low voltage SRAM topology in a 130nm CMOS process for Atmel Norway AS. The topology supports voltage scaling between a subthreshold voltage of 400mV and a regular supply voltage of 1.2V. SRAM cells for ultra-low voltage operation and surrounding read and write circuitry is implemented using state of the art design techniques and literature.An asynchronous self-timed SRAM topology was implemented with conventional 6T SRAM cells and 10T SRAM cells specifically designed for ultra-low voltage operation. A small set of logic gates was also designed for ultra-low voltage operation to realize the surrounding read and write control circuitry. All building blocks were simulated with extracted parasitics from layout to get realistic simulation results. Corner and Monte Carlo simulations were used to show how temperature and process variations statistically affected the building blocks and their performance at both subthreshld and superthreshold voltages.Simulation results shows that the 10T cell is more robust at 400mV with a 60-70% larger static noise margin compared to the conventional 6T cell, but consumes more leakage power and is physically 64% larger. The 10T cell also needs more time to perform a read "0" operation since the single-ended nature of the SRAM cell requires a full bitline-swing to perform the read operation whereas the differential nature of the 6T cells speed up the read operation, but the offset voltage of the sense amplifier limits the speed gain at 400mV somewhat compared to at 1.2V. The read operation of the 6T cell causes a disturb voltage in the internal nodes of the SRAM cell and its magnitude is affected by the number of SRAM cells in the array, the width of the wordline signal and temperature. The impact of these factors are greater at high voltages, making it difficult to assess the yield in systems with voltage scaling. The 10T cell uses a read buffer to decouple the read and write operation and do not encounter this problem and this makes the 10T cell more predictable with voltage scaling and the safest choice for future implementations.The results also show that the power savings when moving from 1.2V to 400mV are withing the range of 5-18 times depending on the severity of process variations and temperature. The lowest power savings occur at high temperatures due to increased leakage currents. The largest savings occurs at low temperatures, but the performance is degraded to such a degree that the 10T implementation requires 5 32kHz clock cycles to complete a read "0" operation while the 6T implementation requires 3 at -40C in the SS process corner. To combat the extreme degradation in speed the supply voltage must be raised either permanently or through some kind of dynamic supply voltage compensation

    Improvement in the Reliability of a Bi-Processing Unit Satellite Subject to Radiation-Induced Bit-Flips

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    The design of reliable spacecrafts is a challenging task because of the harshconstraints imposed by the outer space environment. One major cause offailure of part or totality of the system lies in the space radiations whichaffect the embedded electronic components, such as the introduction ofbit-flips in the memory devices.The work accomplished in this thesis attempts to improve the reliabilityof NUTS (NTNU - Test Satellite). The focus has been set on the researchof software techniques leveraging the hardware architecture available inorder to achieve tolerance against radiation-induced bit-flips.A study of the effect of bit-flips in both data and program memory hasled to the establishment of a stack of techniques aiming at increasingthe reliability of the system in a radiated environment. These techniquesconsist of the use of watchdogs, the corruption detection and correctionof the program memory, the recourse of a JTAG channel to reprogram adeficient processing unit, and the takeover of the whole system by oneprocessing unit in the event of a permanent failure of the second one.Each technique has been thoroughly tested individually in the presence ofbit-flip injection. Additionally, a test of the whole protective stack showedvery positive results since the system has been able to run successfullyfor more than 8 hours sustaining a bit-flip density 250 times higher thanthe expected on-orbit rate

    Entanglement and its applications in systems with many degrees of freedom

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    Entanglement are the non-local correlations permitted by quantum theory, believed to play a fundamental role in a quantum computer. We have investigated these correlations in a number of theoretical models for condensed matter systems. Such systems are likely candidates for quantum computing, and experimentally feasible for instance as superconducting qubits. At quantum critical points the ground state of these systems is very complicated, and the entanglement is usually larger than at non-critical points. This entanglement can be used to identify the critical points through what we denote the entanglement signature, even for very small systems. From another perspective, it seems that the entanglement is an essential tool to find an unknown ground state, since this gives rise to a simple decomposition of the state.Comment: PhD thesis, 85 page

    Arabidopsis thaliana MIRO1 and MIRO2 GTPases Are Unequally Redundant in Pollen Tube Growth and Fusion of Polar Nuclei during Female Gametogenesis

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    MIRO GTPases have evolved to regulate mitochondrial trafficking and morphology in eukaryotic organisms. A previous study showed that T-DNA insertion in the Arabidopsis MIRO1 gene is lethal during embryogenesis and affects pollen tube growth and mitochondrial morphology in pollen, whereas T-DNA insertion in MIRO2 does not affect plant development visibly. Phylogenetic analysis of MIRO from plants revealed that MIRO 1 and 2 orthologs in dicots cluster in two separate groups due to a gene/genome duplication event, suggesting that functional redundancy may exists between the two MIRO genes. To investigate this possibility, we generated miro1(+/−)/miro2-2(−/−) plants. Compared to miro1(+/−) plants, the miro1(+/−)/miro2-2(−/−) plants showed increased segregation distortion. miro1(+/−)/miro2-2(−/−) siliques contained less aborted seeds, but more than 3 times the number of undeveloped ovules. In addition, reciprocal crosses showed that co-transmission through the male gametes was nearly absent, whereas co-transmission through the female gametes was severely reduced in miro1(+/−)/miro2-2(−/−) plants. Further investigations revealed that loss of MIRO2 (miro2(−/−)) function in the miro1(+/−) background enhanced pollen tube growth defects. In developing miro1(+/−)/miro2(−/−) embryo sacs, fusion of polar nuclei was further delayed or impaired compared to miro1 plants. This phenotype has not been reported previously for miro1 plants and coincides with studies showing that defects in some mitochondria-targeted genes results in the same phenotype. Our observations show that loss of function in MIRO2 in a miro1(+/−) background enhances the miro1(+/−) phenotype significantly, even though miro2(−/−) plants alone does not display any phenotypes. Based on these findings, we conclude that MIRO1 and MIRO2 are unequally redundant and that a proportion of the miro1(+/−)/miro2(−/−) plants haploid gametes displays the complete null phenotype of MIRO GTPase function at key developmental stages
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