Using ER Models for Microprocessor Functional Test Coverage Evaluation

Test coverage evaluation is one of the most critical issues in microprocessor software-based testing. Whenever the test is developed in the absence of a structural model of the microprocessor, the evaluation of the final test coverage may become a major issue. In this paper, we present a microprocessor modeling technique based on entity-relationship diagrams allowing the definition and the computation of custom coverage functions. The proposed model is very flexible and particularly effective when a structural model of the microprocessor is not availabl

Smart motor technology

Current spacecraft design relies upon microprocessor control; however, motors usually require extensive additional electronic circuitry to interface with these microprocessor controls. An improved control technique that allows a smart brushless motor to connect directly to a microprocessor control system is described. An actuator with smart motors receives a spacecraft command directly and responds in a closed loop control mode. In fact, two or more smart motors can be controlled for synchronous operation

Genomic analysis suggests that mRNA destabilization by the microprocessor is specialized for the auto-regulation of Dgcr8.

BackgroundThe Microprocessor, containing the RNA binding protein Dgcr8 and RNase III enzyme Drosha, is responsible for processing primary microRNAs to precursor microRNAs. The Microprocessor regulates its own levels by cleaving hairpins in the 5'UTR and coding region of the Dgcr8 mRNA, thereby destabilizing the mature transcript.Methodology/principal findingsTo determine whether the Microprocessor has a broader role in directly regulating other coding mRNA levels, we integrated results from expression profiling and ultra high-throughput deep sequencing of small RNAs. Expression analysis of mRNAs in wild-type, Dgcr8 knockout, and Dicer knockout mouse embryonic stem (ES) cells uncovered mRNAs that were specifically upregulated in the Dgcr8 null background. A number of these transcripts had evolutionarily conserved predicted hairpin targets for the Microprocessor. However, analysis of deep sequencing data of 18 to 200nt small RNAs in mouse ES, HeLa, and HepG2 indicates that exonic sequence reads that map in a pattern consistent with Microprocessor activity are unique to Dgcr8.Conclusion/significanceWe conclude that the Microprocessor's role in directly destabilizing coding mRNAs is likely specifically targeted to Dgcr8 itself, suggesting a specialized cellular mechanism for gene auto-regulation

Pupillometry, a bioengineering overview

The pupillary control system is examined using a microprocessor based integrative pupillometer. The real time software functions of the microprocessor include: data collection, stimulus generation and area to diameter conversion. Results of an analysis of linear and nonlinear phenomena are presented

Rapidly quantifying the relative distention of a human bladder

A device and method was developed to rapidly quantify the relative distention of the bladder of a human subject. An ultrasonic transducer is positioned on the human subject near the bladder. A microprocessor controlled pulser excites the transducer by sending an acoustic wave into the human subject. This wave interacts with the bladder walls and is reflected back to the ultrasonic transducer where it is received, amplified, and processed by the receiver. The resulting signal is digitized by an analog to digital converter, controlled by the microprocessor again, and is stored in data memory. The software in the microprocessor determines the relative distention of the bladder as a function of the propagated ultrasonic energy. Based on programmed scientific measurements and the human subject's past history as contained in program memory, the microprocessor sends out a signal to turn on any or all of the available alarms. The alarm system includes and audible alarm, the visible alarm, the tactile alarm, and the remote wireless alarm

Microprocessor user support at Langley Research Center

The use of microprocessors pose significant problems including: (1) a long learning process for proficient use of microprocessors; (2) the requirement for extensive support in both hardware and software; and (3) the need for coordination and sharing of the creative effort to avoid unnecessary duplication. To address these problems, Langley Research Center has established a microprocessor users committee to provide an advisory interface for management and users, and is training microprocessor users. A newsletter is published to disseminate information among microprocessor users. Both cross software on the central computer complex and microprocessor development systems are used to support the design of microprocessor based systems. Each of these activities is reviewed with special emphasis given to the microprocessor support available from the central computer complex. The effectiveness of the approach being taken at Langley is assessed and specific hardware and software development efforts that are targeted toward enhancing the existing microprocessing support are discussed

Microprocessor control of a wind turbine generator

A microprocessor based system was used to control the unattended operation of a wind turbine generator. The turbine and its microcomputer system are fully described with special emphasis on the wide variety of tasks performed by the microprocessor for the safe and efficient operation of the turbine. The flexibility, cost and reliability of the microprocessor were major factors in its selection

VLSI design of the tiny RISC microprocessor

This report describes the Tiny RISC microprocessor designed at UC Irvine. Tiny RISC is a 16-bit microprocessor and has a RISC-style architecture. The chip was fabricated by MOSIS [1] in a 2μm n-well CMOS technology. The processor has a cycle time of 70 ns

Integrally regulated solar array demonstration using an Intel 8080 microprocessor

A concept for regulating the voltage of a solar array by using a microprocessor to effect discrete voltage changes was demonstrated. Eight shorting switches were employed to regulate a simulated array at set-point voltages between 10,000 and 15,000 volts. The demonstration showed that the microprocessor easily regulated the solar array output voltage independently of whether or not the switched cell groups were binary sized in voltage. In addition, the microprocessor provided logic memory capability to perform additional tasks such as locating and insolating a faulty switch

Report on the formal specification and partial verification of the VIPER microprocessor

The formal specification and partial verification of the VIPER microprocessor is reviewed. The VIPER microprocessor was designed by RSRE, Malvern, England, for safety critical computing applications (e.g., aircraft, reactor control, medical instruments, armaments). The VIPER was carefully specified and partially verified in an attempt to provide a microprocessor with completely predictable operating characteristics. The specification of VIPER is divided into several levels of abstraction, from a gate-level description up to an instruction execution model. Although the consistency between certain levels was demonstrated with mechanically-assisted mathematical proof, the formal verification of VIPER was never completed