P-channel silicone gate FET

Modified fabrication technique for P-channel MOSFET devices eliminates problems involving gate placement and gate overlap. Technique provides self-aligned gate, eliminating complexity of mask aligning. Devices produced by this process are considerably faster than conventional MOSFET's and process increases yield

Characterization of silicon-gate CMOS/SOS integrated circuits processed with ion implantation

Progress in developing the application of ion implantation techniques to silicon gate CMOS/SOS processing is described. All of the conventional doping techniques such as in situ doping of the epi-film and diffusion by means of doped oxides are replaced by ion implantation. Various devices and process parameters are characterized to generate an optimum process by the use of an existing SOS test array. As a result, excellent circuit performance is achieved. A general description of the all ion implantation process is presented

Characterization of silicon-gate CMOS/SOS integrated circuits processed with ion implantation

The double layer metallization technology applied on p type silicon gate CMOS/SOS integrated circuits is described. A smooth metal surface was obtained by using the 2% Si-sputtered Al. More than 10% probe yield was achieved on solar cell controller circuit TCS136 (or MSFC-SC101). Reliability tests were performed on 15 arrays at 150 C. Only three arrays failed during the burn in, and 18 arrays out of 22 functioning arrays maintained the leakage current below 100 milli-A. Analysis indicates that this technology will be a viable process if the metal short circuit problem between the two metals can be reduced

Theoretical studies of spin-dependent electronic transport in ferromagnetically contacted graphene flakes

Based on a tight-binding model and a recursive Green's function technique, spin-depentent ballistic transport through tinny graphene sheets (flakes) is studied. The main interest is focussed on: electrical conductivity, giant magnetoresistance (GMR) and shot noise. It is shown that when graphene flakes are sandwiched between two ferromagnetic electrodes, the resulting GMR coefficient may be quite significant. This statement holds true both for zigzag and armchair chiralities, as well as for different aspect (width/length) ratios. Remarkably, in absolute values the GMR of the armchair-edge graphene flakes is systematically greater than that corresponding to the zigzag-edge graphene flakes. This finding is attributed to the different degree of conduction channel mixing for the two chiralities in question. It is also shown that for big aspect ratio flakes, 3-dimensional end-contacted leads, very much like invasive contacts, result in non-universal behavior of both conductivity and Fano factor.Comment: to appear in PR

Plane-stress, elastic-plastic states in the vicinity of crack tips

Plane stress analysis of elastic-plastic states in vicinity of straight crack tip in thin plat