5,734 research outputs found

    The CMS Level-1 Trigger at LHC and Super-LHC

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    The Level-1 trigger of the CMS experiment at CERN has been designed to select proton-proton interactions whose final state includes signatures of new physics in the form of high transverse energy electrons, photons, jets, or high missing transverse energy. The Level-1 trigger system process data in a pipeline fashion at a rate of 40 MHz, has a design latency of 128 bunch crossings and an output rate of 100 KHz. The design of this system is presented with emphasis on the calorimeter triggers. After a long period of testing and validation of its performance the Level-1 trigger system has been installed and commissioned at the CMS experiment at CERN. Cosmic ray data and Monte Carlo events have been used to compare the actual performance of the trigger with expectations from off-line emulation models. Results from these studies are presented here. The limitations of this system to cope with future luminosity upgrades of the LHC, the Super-LHC, are discussed. The current CMS plan for a new CMS Level-1 trigger system at the Super-LHC is presented. The center point of the new system is a Level-1 tracking trigger which uses data from a new CMS silicon tracking detector.Comment: 8 pages 4 figure

    A Study for a Tracking Trigger at First Level for CMS at SLHC

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    It is expected that the LHC accelerator and experiments will undergo a luminosity upgrade which will commence after several years of running. This part of the LHC operations is referred to as Super-LHC (SLHC) and is expected to provide beams of an order of magnitude larger luminosity (1035cm-2sec-1) than the current design. Preliminary results are presented from a feasibility study for a First Level Tracking Trigger for CMS at the SLHC using the data of the inner tracking detector. As a model for these studies the current CMS pixel detector with the same pixel size and radial distances from the beam has been used. Monte Carlo studies have been performed using the full CMS simulation package (OSCAR) and the occupancy of such a detector at SLHC beam conditions has been calculated. The design of an electron trigger which uses both the calorimeter energy depositions and the pixel data to identify isolated electrons and photons has been investigated. Results on the tracker occupancy and the electron trigger performance are presentedComment: Presented at LECC, Heidelberg 200

    Stacked Tracking for CMS at Super-LHC

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    We report recent work on the design of a pixel detector for CMS at the Super-LHC. This work builds on previous studies of a tracking detector capable of providing track stubs to be used in the Level-1 Trigger (L1T). We now focus on the use of two ‘superlayers’ of tracking; each comprising a pair of pixel sensors with 50×50×50ÎŒm3 pitch (zĂ—Ï†Ă—r) separated by a few millimetres. Preliminary work on track reconstruction in Field Programmable Gate Arrays (FPGAs) is also presented

    Trigger R&D for CMS at SLHC

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    CERN has made public a comprehensive plan for upgrading the LHC proton-proton accelerator to provide increased luminosity commonly referred to as Super LHC (SLHC) [1]. The plan envisages two phases of upgrades during which the LHC luminosity increases gradually to reach between 6-7×1034 cm-2sec-1. Over the past year, CMS has responded with a series of workshops and studies which have defined the roadmap for upgrading the experiment to cope with the SLHC environment. Increased luminosity will result in increased backgrounds and challenges for CMS and a major part of the CMS upgrade plan is a new Level-1 Trigger (L1T) system which will be able to cope with the high background environment at the SLHC. Two major CMS milestones will define the evolution of the CMS trigger upgrades: The change of the Hadronic Calorimeter electronics during phase-I and the introduction of the track trigger during phase-II. This paper outlines alternative designs for a new trigger system and the consequences for cost, latency, complexity and flexibility. In particular, it looks at how the trigger geometry of CMS could be mapped onto the latest generation of hardware while remaining backwards compatible with current infrastructure. A separate paper presented at this conference [2] looks at what could be possible if large parts of the trigger system were changed, or additional hardware added to create a time multiplexed trigger system

    The GCT Matrix Card and its Applications

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    The Matrix card is the first in what is expected to be a series of xTCA cards produced for a variety of projects at CMS. It was developed as a joint collaboration between colleagues at Princeton, Imperial College, LANL and CERN. The device comprises the latest generation of readilyavailable Xilinx FPGAs, cross-point switch technology and high-density optical links in a 3U form factor. In this paper we will discuss the development and test results of the Matrix card, followed by some of the tasks to which it is being applied

    The CMS Global Calorimeter Trigger Hardware Design

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    An alternative design for the CMS Global Calorimeter Trigger (GCT) is being implemented. The new design adheres to all the CMS specifications regarding interfaces and functional requirements of the trigger systems. The design is modular, compact, and utilizes proven components. Functionality has been partitioned to allow commissioning in stages corresponding to the different capabilities being made operational. The functional breakdown and hardware platform is presented and discussed. A related paper discusses the firmware required to implement the GCT functionality

    Meson Structure Functions in Valon Model

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    Parton distributions in a {\it{valon}} in the next-to-leading order is used to determine the patron distributions in pion and kaon. The validity of the valon model is tested and shown that the partonic content of the valon is universal and independent of the valon type. We have evaluated the valon distribution in pion and kaon, and in particular it is shown that the results are in good agreement with the experimental data on pion structure in a wide range of x=[10−4,1]x=[10^{-4},1]Comment: 13 pages with 7 figures included, The manuscript is revised, figures are added and some errors are corrected. Accepted for publication in Physical Review

    Experimental Evidence for Simple Relations between Unpolarized and Polarized Parton Distributions

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    The Pauli exclusion principle is advocated for constructing the proton and neutron deep inelastic structure functions in terms of Fermi-Dirac distributions that we parametrize with very few parameters. It allows a fair description of the recent NMC data on F2p(x,Q2)F^p_2(x,Q^2) and F2n(x,Q2)F^n_2(x,Q^2) at Q2=4GeV2Q^2=4 GeV^2, as well as the CCFR neutrino data at Q2=3Q^2=3 and 5GeV25 GeV^2. We also make some reasonable and simple assumptions to relate unpolarized and polarized quark parton distributions and we obtain, with no additional free parameters, the spin dependent structure functions xg1p(x,Q2)xg^p_1(x,Q^2) and xg1n(x,Q2)xg^n_1(x,Q^2). Using the correct Q2Q^2 evolution, we have checked that they are in excellent agreement with the very recent SMC proton data at Q2=10GeV2Q^2=10 GeV^2 and the SLAC neutron data at Q2=2GeV2Q^2=2 GeV^2.Comment: 17 pages,CPT-94/P.3032,latex,6 fig available on cpt.univ-mrs.fr directory pub/preprints/94/fundamental-interactions /94-P.303

    The CMS Tracker Readout Front End Driver

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    The Front End Driver, FED, is a 9U 400mm VME64x card designed for reading out the Compact Muon Solenoid, CMS, silicon tracker signals transmitted by the APV25 analogue pipeline Application Specific Integrated Circuits. The FED receives the signals via 96 optical fibers at a total input rate of 3.4 GB/sec. The signals are digitized and processed by applying algorithms for pedestal and common mode noise subtraction. Algorithms that search for clusters of hits are used to further reduce the input rate. Only the cluster data along with trigger information of the event are transmitted to the CMS data acquisition system using the S-LINK64 protocol at a maximum rate of 400 MB/sec. All data processing algorithms on the FED are executed in large on-board Field Programmable Gate Arrays. Results on the design, performance, testing and quality control of the FED are presented and discussed