21 research outputs found

    Antenna measurement techniques : measurement hardware-induced pattern distortions

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    The demand for mobile connectivity is continuously increasing, and by 2020 Mobile and Wireless Communications will serve not only very dense populations of mobile phones and nomadic computers, but also the expected multiplicity of devices and sensors located in machines, vehicles, health systems and city infrastructures. Future Mobile Networks are then faced with many new scenarios and use cases, which will load the networks with different data traffic patterns, in new or shared spectrum bands, creating new specific requirements. This book addresses both the techniques to model, analyse and optimise the radio links and transmission systems in such scenarios, together with the most advanced radio access, resource management and mobile networking technologies. \u3cbr/\u3e\u3cbr/\u3e This text summarises the work performed by more than 500 researchers from more than 120 institutions in Europe, America and Asia, from both academia and industries, within the framework of the COST IC1004 Action on Cooperative Radio Communications for Green and Smart Environments . The book will have appeal to graduates and researchers in the Radio Communications area, and also to engineers working in the Wireless industry. \u3cbr/\u3e\u3cbr/\u3e Topics discussed in this book include: \u3cbr/\u3e\u3cbr/\u3eRadio waves propagation phenomena in diverse urban, indoor, vehicular and body environments\u3cbr/\u3eMeasurements, characterization, and modelling of radio channels beyond 4G networks\u3cbr/\u3eKey issues in Vehicle (V2X) communication\u3cbr/\u3eWireless Body Area Networks, including specific Radio Channel Models for WBANs \u3cbr/\u3eEnergy efficiency and resource management enhancements in Radio Access Networks\u3cbr/\u3eDefinitions and models for the virtualised and cloud RAN architectures \u3cbr/\u3eAdvances on feasible indoor localization and tracking techniques\u3cbr/\u3eRecent findings and innovations in antenna systems for communications\u3cbr/\u3ePhysical Layer Network Coding for next generation wireless systems \u3cbr/\u3eMethods and techniques for MIMO Over the Air (OTA) testing \u3cbr/\u3

    Method to match waves of ray-tracing simulations with 3-D high-resolution propagation measurements

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    High-resolution propagation measurements were carried out to verify the angular and delay dispersion predicted by ray-tracing models. To do the comparison between the measured and simulated results, the corresponding waves should first be identified. This paper introduces a method to find the corresponding relationship of waves automatically. The results show that the algorithm can successfully find the matching simulated and measured waves. It also provides the information to find and further investigate the most dominant propagation mechanisms

    RF Circuits Laboratory for Remote Learning and Massive Open Online Courses

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    Students should be able to learn and understand the theory behind the studied topic, to validate their analysis in simulations, and finally to experiment in the real-life their solutions. Massive open online courses (MOOCs) have gained increasing popularity in recent years, but remote experimentation with electronics circuits, especially RF, is nearly inexistent. This paper will present the hardware and software implementation of an RF remote lab for students without physical access to lab facilities. The RF remote lab is an open-source, easy-to-use online tool created to make RF circuits education more accessible

    Disturbing effects of microwave probe on mm-wave antenna pattern measurements

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    In order to be able to measure and validate an antenna design in the mm-wave frequency range it must be connected to a Vector Network Analyzer or Spectrum Analyzer. One of the challenges is to interconnect such a small antenna and the measurement equipment without influencing the antenna measurements. A commonly used method for interconnection is making use of a connector or a probe. The problem is that the connector as well as the probe are often many times larger than the antenna under test itself and are located close to the radiating part of the antenna structure. This means that the antenna measurements will be influenced. Therefore, the paper focuses on the disturbing effects of the probe as a reflective and obstructive object on mm-wave antenna pattern measurements, specifically in the 60 GHz band, and how they can be reduced

    A 23 G Hz RF-beamforming Transmitter with > 15.5 dBm Psatand >21.7% Peak Efficiency for Inter-satellite Communications

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    This paper presents a 23GHz RF-beamforming transmitter (TX) for inter-satellite communications. By combining a variable gain amplifier (VGA), a phase shifter (PS), and a four-inductor-coupling differential quadrature-signal (IQ) generator, a power-efficient design with high compactness is demonstrated. The chip is fabricated in a 130nm SiGe BiCMOS technology. It achieves a measured saturated output power (Psat) of >15.5dBm and a peak TX efficiency of >21.7%, with 2.09° RMS phase error and >29.3dB maximum power gain. The realized mm-wave TX supports 64-QAM with a 900Mbps data rate, the Error Vector Magnitude (EVM) of 4.98% (-26.06dB), the Adjacent Channel Power Ratio (ACPR) of-30.1dBc, and TX efficiency of 8.52% are measured at 9.2dBm output power. The core area of this TX is 0.9mm x 0.23mm

    Dual-channel 56 Gb/s PAM-4 electro-absorption modulator driver for 3D wafer scale packaging

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    \u3cp\u3e This paper presents the design and measurement of a 2 × 56 Gb/s PAM-4 dual-channel electro-absorption modulator (EAM) driver in a 0.25-μm SiGe:C BiCMOS process for 3D wafer scale packaging. In this paper, a new EAM coupling method for 3D wafer scale packing is presented. The driver employs an optimized output interface with the EAM, which increases the output voltage swing by 53% while keep the same bandwidth and power consumption. The driver has 13.7 dB of gain with a 3 dB bandwidth of 31.5 GHz, which delivers 3 V \u3csub\u3eppd\u3c/sub\u3e at 56 Gb/s PAM-4 and consumes 364.5 mW per channel, resulting in a figure of merit of 6.5 pJ/bit. \u3c/p\u3

    A DC-51.5 GHz electro-absorption modulator driver with tunable differential DC coupling for 3D wafer scale packaging

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    This paper presents a DC-51.5 GHz PAM-4 dual-channel electro-absorption modulator (EAM) driver realized in a 0.25-μm SiGe:C BiCMOS technology. The EAM driver is designed for 3D wafer scale packaging which integrates silicon electronics IC and InP photonics IC at wafer scale. A new asymmetric-load differential driver topology is proposed to achieve a tunable DC biasing for the EAM without extra off-chip bias-T, which significantly reduces the packaging complexity and cost. Moreover, the driver uses differential outputs to drive a single-ended EAM, which reduces the voltage swing by a factor two and reduces the power consumption. The driver has 9.4 dB gain with a 3 dB bandwidth of 51.5 GHz and -0.2 ~ -2 V tunable output DC biasing range. It delivers a differential output voltage swing of 2 Vppd at 56 Gb/s PAM-4 and consumes 219 mW per channel, resulting in a figure of merit of 3.9 pJ/bit.</p

    A DC-51.5 GHz electro-absorption modulator driver with tunable differential DC coupling for 3D wafer scale packaging

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    This paper presents a DC-51.5 GHz PAM-4 dual-channel electro-absorption modulator (EAM) driver realized in a 0.25-μm SiGe:C BiCMOS technology. The EAM driver is designed for 3D wafer scale packaging which integrates silicon electronics IC and InP photonics IC at wafer scale. A new asymmetric-load differential driver topology is proposed to achieve a tunable DC biasing for the EAM without extra off-chip bias-T, which significantly reduces the packaging complexity and cost. Moreover, the driver uses differential outputs to drive a single-ended EAM, which reduces the voltage swing by a factor two and reduces the power consumption. The driver has 9.4 dB gain with a 3 dB bandwidth of 51.5 GHz and -0.2 ~ -2 V tunable output DC biasing range. It delivers a differential output voltage swing of 2 Vppd at 56 Gb/s PAM-4 and consumes 219 mW per channel, resulting in a figure of merit of 3.9 pJ/bit

    A106nW 10 b 80 kS/s SAR ADC with duty-cycled reference generation in 65 nm CMOS

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    This paper presents a 10 b 80 kS/s SAR ADC with low-power duty-cycled reference generation. It generates a stable reference voltage on chip for the SAR ADC and imparts very good immunity against power supply interference to the ADC. A 0.62 V-VDD 25 nW CMOS reference voltage generator (RVG) is presented, which has only ±1.5% variation over process corners. A duty-cycling technique is applied to enable 10% duty-cycling of the RVG, resulting in negligible power consumption of the RVG compared to that of the ADC. Furthermore, a bi-directional dynamic preamplifier is adopted in the SAR ADC, which consumes about half the power compared with a regular dynamic structure and maintains noise and gain performance. Compared with prior-art low-power ADCs, this work is the first to integrate the reference generation and include it in the power consumption while maintaining a competitive 2.4 fJ/conversion-step FoM. The chip is fabricated in 65 nm CMOS technology

    A 60 GHz low noise variable gain amplifier with small noise figure and IIP3 variation in a 40-nm CMOS technology

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    This paper presents the design and measurement of a low noise variable gain amplifier (VGA) over the frequency band of 57 GHz and 64 GHz, using 40-nm CMOS technology. The design applies an inductive degeneration technique for simultaneously noise and power matching, a layout gate inductance for gain frequency extension, and current steering technique for gain tuning. The comparison of a low noise amplifier (LNA) and a low noise VGA is done, in terms of noise figure and linearity (IIP3). The LNA achieves 6.7 dB gain and 4.3 dB noise figure (NF) at 60 GHz, while consuming 12 mA from a 1.1 V supply. The IIP3 of the LNA is-12.8 dBm. The VGA has an S21 of 6.67 dB (maximum) and 5.1 dB NF at 58 GHz. The gain tuning range is 6 dB and the NF deviation is 0.8 dB at 60 GHz and the IIP3 is-7.66 dBm at the maximum gain state. The supply voltage of the VGA is 1.1 V and the DC current is 11 mA
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