4 research outputs found
Digital second-order phase-locked loop
A digital second-order phase-locked loop is disclosed in which a counter driven by a stable clock pulse source is used to generate a reference waveform of the same frequency as an incoming waveform, and to sample the incoming waveform at zero-crossover points. The samples are converted to digital form and accumulated over M cycles, reversing the sign of every second sample. After every M cycles, the accumulated value of samples is hard limited to a value SGN = + or - 1 and multiplied by a value delta sub 1 equal to a number of n sub 1 of fractions of a cycle. An error signal is used to advance or retard the counter according to the sign of the sum by an amount equal to the sum
Digital command system second-order subcarrier tracking performance
Equations to determine tracking performance for second order, phase locked loop used for subcarrier synchronization on digital command syste
Tone-activated, remote, alert communication system
Pocket sized transmitter, frequency modulated by crystal derived tones, with integral loop antenna provides police with easy operating alert signal communicator which uses patrol car radio to relay signal. Communication channels are time shared by several patrol units
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A SIMPLE SECOND-ORDER DIGITAL PHASE-LOCKED LOOP
International Telemetering Conference Proceedings / October 10-12, 1972 / International Hotel, Los Angeles, CaliforniaA simple second-order digital phase-locked loop has been designed for the Viking Orbiter 1975 command system.** Excluding analog-to-digital conversion, implementation of the loop requires only an adder/subtracter, two registers, and a correctable counter with control logic. The loop considers only the polarity of phase error and corrects system clocks according to a filtered sequence of this polarity. The loop is insensitive to input gain variation, and therefore offers the advantage of stable performance over long life. Predictable performance is guaranteed by extreme reliability of acquisition, yet in the steady state the loop produces only a slight degradation with respect to analog loop performance. Analytical predictions and experimental performance are given in the following for both acquisition behavior and steady state phase error.International Foundation for TelemeteringProceedings from the International Telemetering Conference are made available by the International Foundation for Telemetering and the University of Arizona Libraries. Visit http://www.telemetry.org/index.php/contact-us if you have questions about items in this collection