Realization of quantum walks with negligible decoherence in waveguide lattices

Quantum random walks are the quantum counterpart of classical random walks, and were recently studied in the context of quantum computation. Physical implementations of quantum walks have only been made in very small scale systems severely limited by decoherence. Here we show that the propagation of photons in waveguide lattices, which have been studied extensively in recent years, are essentially an implementation of quantum walks. Since waveguide lattices are easily constructed at large scales and display negligible decoherence, they can serve as an ideal and versatile experimental playground for the study of quantum walks and quantum algorithms. We experimentally observe quantum walks in large systems (similar to 100 sites) and confirm quantum walks effects which were studied theoretically, including ballistic propagation, disorder, and boundary related effects

Effect of Nonlinearity on Adiabatic Evolution of Light

We investigate the effect of nonlinearity in a system described by an adiabatically evolving Hamiltonian. Experiments are conducted in a three-core waveguide structure that is adiabatically varying with distance, in analogy to the stimulated Raman adiabatic passage process in atomic physics. In the linear regime, the system exhibits an adiabatic power transfer between two waveguides which are not directly coupled, with negligible power recorded in the intermediate coupling waveguide. In the presence of nonlinearity the adiabatic light passage is found to critically depend on the excitation power. We show how this effect is related to the destruction of the dark state formed in this configuration

Polarization-entangled photon pair sources based on spontaneous four wave mixing assisted by polarization mode dispersion

Photonic-based qubits and integrated photonic circuits have enabled demonstrations of quantum information processing (QIP) that promises to transform the way in which we compute and communicate. To that end, sources of polarization-entangled photon pair states are an important enabling technology, especially for polarization-based protocols. However, such states are difficult to prepare in an integrated photonic circuit. Scalable semiconductor sources typically rely on nonlinear optical effects where polarization mode dispersion (PMD) degrades entanglement. Here, we directly generate polarization-entangled states in an AlGaAs waveguide, aided by the PMD and without any compensation steps. We perform quantum state tomography and report a raw concurrence as high as 0.91$\pm$0.01 observed in the 1100-nm-wide waveguide. The scheme allows direct Bell state generation with an observed maximum fidelity of 0.90$\pm$0.01 from the 800-nm-wide waveguide. Our demonstration paves the way for sources that allow for the implementation of polarization-encoded protocols in large-scale quantum photonic circuits

Narrow Linewidth 780 nm Distributed Feedback Lasers for Cold Atom Quantum Technology

Cold atom quantum technology systems have a wide range of potential applications which includes atomic clocks, rotational sensors, inertial sensors, quantum navigators, magnetometers and gravimeters. The UK Quantum Technology Hub in Sensors and Metrology has the aim of developing miniature cold atom systems using an approach similar to that pioneered by the chip scale atomic clock where microfabricated vacuum chambers have atomic transitions excited and probed by lasers. Whilst narrow linewidth Ti:Sa and external cavity diode lasers have been required for cooling and control, such lasers are too large, power hungry and expensive for future miniature cold atom systems. Here we demonstrate 1 mm long 780.24 nm GaAs/AlGaAs distributed feedback (DFB) lasers aimed at 87Rb cold atom systems operating at 20 ˚C with over 50 mW of power and side-mode suppression ratios of 46 dB using sidewall gratings and no regrowth. Rb spectroscopy is used to demonstrate linewidths below the required 6.07 MHz natural linewidth of the 87Rb D2 optical transition used for cooling. Initial packaged fibre-coupled devices demonstrate lifetimes greater than 200 hours. We also investigate the use of integrated semiconductor amplifiers (SOAs) and longer devices to further reduce the linewidths well below 1 MHz. A range of options to control the populations of electrons in the hyperfine split energy levels spaced by 3.417 GHz are examined. Two integrated lasers, integrated electro-absorption modulators (EAMs) and the direct modulation of a single DFB laser approaches are investigated and we will discuss which is best suited to integrated cold atom systems

A unified model for software-hardware co-design

A unified model of factorized graphs is proposed for the specification and the optimization of real-time embedded application s based on architectures composed of processors and/or specific circuits . First, a graph of operations partially ordered by their data dependencies is used to specify the algorithm and hence its potential parallelism, independently of hardware constraints . Then , it is shown how this dependence graph may be transformed by different kinds of factorization to obtain an implementation, a s specific circuits or as a specialized executive distributed on several processors . Finally, basic principles of optimization are give n for minimizing hardware resources while satisfying real-time constraints . In prospect, this unified approach is expected to be used for optimized software-hardware co-design .On propose un modèle unifié de graphes factorisés, pour spécifier et optimiser des applications temps réel embarquées, basées sur des architectures composées de processeurs et/ou de circuits spécialisés. Tout d'abord on utilise un graphe de dépendances de données entre opérations pour spécifier l'ordre partiel des opérations de l'algorithme et donc son parallélisme potentiel, indépendamment des contraintes matérielles. On montre ensuite comment ce graphe peut être transformé par différentes formes de factorisation pour aboutir à une implantation sous forme de circuits spécialisés ou d'un exécutif spécialisé distribué sur des processeurs. Enfin on donne les principes de base de l'optimisation visant à minimiser les ressources matérielles tout en respectant les contraintes temps réel. On présente en perspective comment cette approche unifiée pourra conduire à l'optimisation de la conception conjointe logiciel-matériel

Pattern manipulation via on-chip phase modulation between orbital angular momentum beams

An integrated approach to thermal modulation of relative phase between two optical vortices with opposite chirality has been demonstrated on a silicon-on-insulator substrate. The device consists of a silicon-integrated optical vortex emitter and a phase controlled 3 dB coupler. The relative phase between two optical vortices can be actively modulated on chip by applying a voltage on the integrated heater. The phase shift is shown to be linearly proportional to applied electrical power, and the rotation angle of the interference pattern is observed to be inversely proportional to topological charge. This scheme can be used in lab-on-chip, communications and sensing applications. It can be intentionally implemented with other modulation elements to achieve more complicated applications

The Orbital Angular Momentum of Light for Ultra-High Capacity Data Centers

The potential of orbital angular momentum (OAM) of light in data center scenarios is presented. OAMs can be exploited for short reach ultra-high bit rate fiber links and as additional multiplexing domain in transparent ultra-high capacity optical switches. Recent advances on OAM integrated photonic technology are also reported. Finally demonstration of OAM-based fiber links (aggregate throughput 17.9 Tb/s) and two layers OAM-WDM-based optical switches are presented exploiting OAM integrated components and demonstrating the achievable benefits in terms of size, weight and power consumption (SWaP) compared to different technologies

Leptonic CP violation studies at MiniBooNE in the (3+2) sterile neutrino oscillation hypothesis

We investigate the extent to which leptonic CP-violation in (3+2) sterile neutrino models leads to different oscillation probabilities for $\bar{\nu}_{\mu}\to\bar{\nu}_e$ and $\nu_{\mu}\to\nu_e$ oscillations at MiniBooNE. We are using a combined analysis of short-baseline (SBL) oscillation results, including the LSND and null SBL results, to which we impose additional constraints from atmospheric oscillation data. We obtain the favored regions in MiniBooNE oscillation probability space for both (3+2) CP-conserving and (3+2) CP-violating models. We further investigate the allowed CP-violation phase values and the MiniBooNE reach for such a CP violation measurement. The analysis shows that the oscillation probabilities in MiniBooNE neutrino and antineutrino running modes can differ significantly, with the latter possibly being as much as three times larger than the first. In addition, we also show that all possible values of the single CP-violation phase measurable at short baselines in (3+2) models are allowed within 99% CL by existing data.Comment: Fixed a typo following PRD Erratum. 8 pages, 5 figure

VLSI implementation of the edge sampling using a conditionned data flow specification

The paper presents a novel approach to automatically synthesize a VLSI circuit implementing an algorithm specified and verified with a conditionned data flow graph . An edge sampling algorithm, classically used in image processing, is taken to experimen t the approach. It is specified and verified with the conditionned data flow language SIGNAL. This allows to produce easily, using straitforward rules, the digital logic diagram, which will be exploited by an automatic synthesis CAD software to produce a VLSI circuit.Cet article présente une nouvelle approche permettant de synthétiser automatiquement le circuit VLSI implantant un algorithme spécifié et vérifié avec un graphe flot de données conditionné. Un algorithme d'échantillonnage de contour, classique en traitement d'images, est utilisé comme exemple pour illustrer l'approche. On le spécifie et on le vérifie avec le langage synchrone flot de données conditionné SIGNAL afin de produire directement, en utilisant des règles simples, le schéma logique correspondant. Ce dernier servira d'entrée à un logiciel de CAO de synthèse automatique de circuit, pour produire un circuit VLSI