Readout Concepts for DEPFET Pixel Arrays

Field effect transistors embedded into a depleted silicon bulk (DEPFETs) can be used as the first amplifying element for the detection of small signal charges deposited in the bulk by ionizing particles, X-ray photons or visible light. Very good noise performance at room temperature due to the low capacitance of the collecting electrode has been demonstrated. Regular two dimensional arrangements of DEPFETs can be read out by turning on individual rows and reading currents or voltages in the columns. Such arrangements allow the fast, low power readout of larger arrays with the possibility of random access to selected pixels. In this paper, different readout concepts are discussed as they are required for arrays with incomplete or complete clear and for readout at the source or the drain. Examples of VLSI chips for the steering of the gate and clear rows and for reading out the columns are presented.Comment: 8 pages, 9 figures, submitted to Nucl. Instr. and Methods as proceedings of the 9th European Symposium on Semiconductor Detectors, Elmau, June 23-27, 200

Radiation hardness of CMS pixel barrel modules

Pixel detectors are used in the innermost part of the multi purpose experiments at LHC and are therefore exposed to the highest fluences of ionising radiation, which in this part of the detectors consists mainly of charged pions. The radiation hardness of all detector components has thoroughly been tested up to the fluences expected at the LHC. In case of an LHC upgrade, the fluence will be much higher and it is not yet clear how long the present pixel modules will stay operative in such a harsh environment. The aim of this study was to establish such a limit as a benchmark for other possible detector concepts considered for the upgrade. As the sensors and the readout chip are the parts most sensitive to radiation damage, samples consisting of a small pixel sensor bump-bonded to a CMS-readout chip (PSI46V2.1) have been irradiated with positive 200 MeV pions at PSI up to 6E14 Neq and with 21 GeV protons at CERN up to 5E15 Neq. After irradiation the response of the system to beta particles from a Sr-90 source was measured to characterise the charge collection efficiency of the sensor. Radiation induced changes in the readout chip were also measured. The results show that the present pixel modules can be expected to be still operational after a fluence of 2.8E15 Neq. Samples irradiated up to 5E15 Neq still see the beta particles. However, further tests are needed to confirm whether a stable operation with high particle detection efficiency is possible after such a high fluence.Comment: Contribution to the 11th European Symposium on Semiconductor Detectors June 7-11, 2009 Wildbad Kreuth, German

The TOTEM front end driver, its components and applications in the TOTEM experiment

The TOTEM Front End Driver, so-called TOTFED, receives and handles trigger building and tracking data from the TOTEM detectors, and interfaces to the global trigger and data acquisition systems. The TOTFED is based on the VME64x standard and has deliberately been kept modular. It is very flexible and programmable to deal with the different TOTEM sub-detectors and possible evolution of the data treatment and trigger algorithms over the duration of the experiment. The main objectives for each unit are to acquire ondetector data from up to 36 optical links, to perform fast data treatment (reduction, consistency checking, etc.), to transfer it to the next level of the system (via the Slink64 interface), and to store data on request for slow spy readout via VME64x or USB2.0. The TOTFED is fully compatible with CMS and permits TOTEM to run both standalone and together with CMS. The TOTEM Front End Driver, its components and applications in the TOTEM experiment are presented in this paper

VFAT2: A front-end system on chip providing fast trigger information, digitized data storage and formatting for the charge sensitive readout of multi-channel silicon and gas particle detectors

The architecture, key design parameters and results for a highly integrated front-end readout system fabricated as a single ASIC are presented. The chip (VFAT2) comprises complex analog and digital functions traditionally designed as separate components. VFAT2 contains very low noise 128 channel front-end amplification with programmable internal calibration, intelligent “fast OR” trigger building outputs, digital data tagging and storage, data formatting and data packet transmission with error protection. VFAT2 is designed to work in the demanding radiation environments posed by modern H.E.P. experiments and in particular the TOTEM experiment of the LHC. Measured results are presented demonstrating full functionality and excellent analog performance despite intensive digital activity on the same piece of silicon

Combining TCAD and Monte Carlo methods to simulate CMOS pixel sensors with a small collection electrode using the Allpix2^{2} framework

Combining electrostatic field simulations with Monte Carlo methods enables realistic modeling of the detector response for novel monolithic silicon detectors with strongly non-linear electric fields. Both the precise field description and the inclusion of Landau fluctuations and production of secondary particles in the sensor are crucial ingredients for the understanding and reproduction of detector characteristics. In this paper, a CMOS pixel sensor with small collection electrode design, implemented in a high-resistivity epitaxial layer, is simulated by integrating a detailed electric field model from finite element TCAD into a Monte Carlo based simulation with the framework. The simulation results are compared to data recorded in test-beam measurements and very good agreement is found for various quantities such as cluster size, spatial resolution and efficiency. Furthermore, the observables are studied as a function of the intra-pixel incidence position to enable a detailed comparison with the detector behavior observed in data. The validation of such simulations is fundamental for modeling the detector response and for predicting the performance of future prototype designs. Moreover, visualization plots extracted from the charge carrier drift model of the framework can aid in understanding the charge propagation behavior in different regions of the sensor

Recent developments of a monolithic silicon pixel detector on moderate resistivity substrates

This paper is focused on the recent submission of a novel monolithic pixel detector developed in standard 90nm CMOS deep sub-micron technology on wafers with moderate resistivity. This option, offered by some silicon foundries, allows to implement monolithic sensors for particle tracking that combine the low power consumption and material budget offered by monolithic active pixel sensors (MAPS) with the speed and radiation hardness characterizing hybrid pixel detectors. Seven ASICs have been submitted in March 2010 containing transistor test structures, a large diode, breakdown test structures and four pixel matrices produced both on standard substrates and on higher resistivity wafers

A VME-based readout system for the CMS Preshower sub-detector

The CMS preshower is a fine grain detector that comprises 4288 silicon sensors, each containing 32 strips. The raw data are transferred from the detector to the counting room via 1208 optical fibres. Each fibre carries a 600-byte data packet per event. The maximum average level-1 trigger rate of 100 kHz results in a total data flow of ~72 GB/s from the preshower. For the readout of the preshower, 56 links to the CMS DAQ have been reserved, each having a bandwidth of 200 MB/s (2 kB/event). The total available downstream bandwidth of GB/s necessitates a reduction in the data volume by a factor of at least 7. A modular VME-based system is currently under development. The main objective of each VME board in this system is to acquire on-detector data from at least 22 optical links, perform on-line data reduction and pass the concentrated data to the CMS DAQ. The principle modules that the system is based on are being developed in collaboration with the TOTEM experiment

Radiation Tolerance of CMOS Monolithic Active Pixel Sensors with Self-Biased Pixels

CMOS Monolithic Active Pixel Sensors (MAPS) are proposed as a technology for various vertex detectors in nuclear and particle physics. We discuss the mechanisms of ionizing radiation damage on MAPS hosting the the dead time free, so-called self bias pixel. Moreover, we discuss radiation hardened sensor designs which allow operating detectors after exposing them to irradiation doses above 1 Mra