User spectral efficiency: combining spectral efficiency with user experience

Electromagnetic spectrum is a scarce resource. Spectrum licensing is estimated to consume about 20% of cellular operators' capital expenditure (CAPEX). One important measure of spectrum use is “spectral efficiency” (SE), which is the amount of data bandwidth that a specific technology can extract from a certain amount of radio spectrum and is measured in bits per second per Hz (bps/Hz). Using data from 4 different mobile operators, we show that spectral efficiency as the measure of bits per second per Hz correlates poorly with users' performance on cellular networks. Applying spectral efficiency directly in network performance monitoring or in network planning can provide misleading diagnostics and poorly targeted expansion plans. We propose a new spectral efficiency metric that combines the raw bit per second per Hz measurement with user perceived performance. We show that this new metric correlates well with measured user throughput and is superior metric for network planning and performance monitoring in real networks. We present a number of applications of our new metric on network management and capacity planning tasks. Our implementation of this approach has been used in operational networks for over 8 years and has provided sound basis for CAPEX decision making.Hung X. Nguyen, Bruce Northcot

FPGA implementation of a memory-efficient Hough Parameter Space for the detection of lines

The Line Hough Transform (LHT) is a robust and accurate line detection algorithm, useful for applications such as lane detection in Advanced Driver Assistance Systems. For real-time implementation, the LHT is demanding in terms of computation and memory, and hence Field Programmable Gate Arrays (FPGAs) are often deployed. However, many small FPGAs are incapable of implementing the LHT due to the large memory requirement of the Hough Parameter Space (HPS). This paper presents a memory-efficient architecture of the LHT named the Angular Regions - Line Hough Transform (AR-LHT). We present a suitable FPGA implementation of the AR-LHT and provide a performance and resource analysis after targeting a Xilinx xc7z010-1 device. Results demonstrate that, for an image of 1024x1024 pixels, approximately 48% less memory is used than the Standard LHT. The FPGA architecture is capable of processing a single image in 9.03ms