Roadmap for SiC power devices, Journal of Telecommunications and Information Technology, 2000, nr 3,4

Silicon carbide (SiC) power devices offer significant benefits of improved efficiency, dynamic performance and reliability of electronic and electric systems. The challenges and prospects of SiC power device development are reviewed considering different device types. A close correlation between an exponential increase of current handling capability during recent five years and improvement in substrate quality is demonstrated. The voltage range of silicon and SiC unipolar and bipolar power devices with respect to the on-state voltage is determined based on device simulation. 4H-SiC unipolar devices are potentially superior to all silicon devices up to 10 kV. 4H-SiC unipolar devices are superior to all SiC bipolar devices up to 8 9 kV. The low end of SiC unipolar devices is determined to be around 200 V provided substrate resistance is reduced by thinning the substrate down to 100 mm. The influence of reduced channel mobility on the specific on-state resistance of 4H-SiC DMOSFETs and UMOSFETs is shown. It has been demonstrated that 6H-SiC DMOSFETs could be a better choice compared to 4H-SiC MOSFETs in the voltage range below 600 V utilising better channel mobility obtainable so far on 6H-SiC polytype. An impact of super junction (SJ) concept on silicon and SiC MOSFET specific on-resistance limits is demonstrated

Prospects and Development of Vertical Normally-off JFETs in SiC, Journal of Telecommunications and Information Technology, 2009, nr 4

This paper reviews the prospects of normally-off (N-off) JFET switch in SiC. The potential of selected vertical JFET concepts and all-JFET cascode solutions for N-off operation is analyzed using simulations. The performance of analyzed concepts is compared in terms of blocking voltage, specific on-state resistance, maximum output current density and switching performance in the temperature range from 25°C to 250°C. The main objective of the analysis is to ascertain consequences of different design and technology options for the total losses and high temperature performance of the devices

Development of 3C-SiC MOSFETs, Journal of Telecommunications and Information Technology, 2007, nr 2

The paper reviews the development of the 3C-SiC MOSFETs in a unique development project combining the material and device expertise of HAST (Hoya Advanced Semiconductor Technologies) and Acreo, respectively. The motivation for the development of the 3C-SiC MOSFETs and the summary of the results from the lateral and vertical devices with varying size from single cell to 3×3 mm2 large devices are reviewed. The vertical devices had hexagonal and square unit cell designs with 2 μm and 4 μm channel length. The p-body was aluminum implanted and the source was nitrogen or phosphorus implanted. Low temperature Ti/W contacts were evaluated

Evaluation of the drive circuit for a dual gate trench SiC JFET

score: 0collation: 946-94

Comparison of Thermal Stress during Short-Circuit in Different Types of 1.2 kV SiC Transistors Based on Experiments and Simulations

The temperature evolution during a short-circuit in the die of three different Silicon Carbide1200-V power devices is presented. A transient thermal simulation was performed based on the reconstructedstructure of commercially available devices. The location of the hottest point in the device iscompared. Finally, the analysis supports the necessity to turn off short-circuit events rapidly in orderto protect the device after a fault.QC 20170530</p

Modeling of the impact of parameter spread on the switching performance of parallel-connected SiC VJFETs

score: 0collation: 1098-110