Indirect test of M-S circuits using multiple specification band guarding

Testing analog and mixed-signal circuits is a costly task due to the required test time targets and high end technical resources. Indirect testing methods partially address these issues providing an efficient solution using easy to measure CUT information that correlates with circuit performances. In this work, a multiple specification band guarding technique is proposed as a method to achieve a test target of misclassified circuits. The acceptance/rejection test regions are encoded using octrees in the measurement space, where the band guarding factors precisely tune the test decision boundary according to the required test yield targets. The generated octree data structure serves to cluster the forthcoming circuits in the production testing phase by solely relying on indirect measurements. The combined use of octree based encoding and multiple specification band guarding makes the testing procedure fast, efficient and highly tunable. The proposed band guarding methodology has been applied to test a band-pass Butterworth filter under parametric variations. Promising simulation results are reported showing remarkable improvements when the multiple specification band guarding criterion is used.Peer ReviewedPostprint (author's final draft

Evaluación de los protocolos de acceso al medio CSMA/CD (acceso multiple con escuha de canal y detección de colisión) y paso de testigo, en redes locales con topologia bus

El objetivo de la tesis es crear una herramienta de evaluación de prestaciones de redes de área local a nivel MAC para los mecanismos de acceso múltiple aleatorio y con control mediante paso de testigo. La metodología de evaluación se basa en la obtención de modelos analíticos y de simulación y su contratación con resultados experimentales. En acceso aleatorio se aportan modelos analíticos de características caudal-retardo explicitas para los protocolos CSMA/CD en función del concepto de persistencia del acceso.Del mecanismo de paso de testigo se estudia la dependencia estadística introducida por el mecanismo de acceso para los casos de estación sin almacenamiento y almacenamiento infinito

Test of dual axis accelerometers based on specifications compliance

Postprint (published version

Quality metrics for mixed-signal indirect testing

Postprint (published version

An Efficient behavioral description frontend tool for mixed-mode SPICE simulation

Postprint (published version

Verifying analog circuits based on a digital signature

Verification of analog circuit specifications is a challenging task requiring expensive test equipment and time consuming procedures. This paper presents a method for low cost parameter verification based on statistical analysis of a digital signature. A CMOS on-chip monitor and sampler circuit generates the digital signature of the CUT. The monitor composes two signals (x(t); y(t)) and divides the X-Y plane with nonlinear boundaries in order to generate a digital code for every analog (x; y) location. A metric to be used to discriminate the golden and defective signatures is also proposed. The metric is based on the definition of a discrepancy factor performing circuit parameter identification via statistical and pre-training procedures. The proposed method is applied to verify possible deviations on the natural frequency of a Biquad filter. Simulation results show the possibilities of the proposal.Postprint (published version

Digital signature generator for mixed-signal testing

Ponència presentada al 14th IEEE European Test SymposiumEs presenta un nou generador de signatures digitals per controlar dues senyals anàlogues. Es presenta la tecnologia STM 65 nm per demostrar la viabilitat de la proposta.Postprint (published version

Built-In test of MEMS capacitive accelerometers for field failures and aging degradation.

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Analog circuit test based on a digital signature

Production verification of analog circuit specifica- tions is a challenging task requiring expensive test equipment and time consuming procedures. This paper presents a method for low cost on-chip parameter verification based on the analysis of a digital signature. A 65 nm CMOS on-chip monitor is proposed and validated in practice. The monitor composes two signals (x(t), y(t)) and divides the X-Y plane with nonlinear boundaries in order to generate a digital code for every analog (x, y) location. A digital signature is obtained using the digital code and its time duration. A metric defining a discrepancy factor is used to verify circuit parameters. The method is applied to detect possible deviations in the natural frequency of a Biquad filter. Simulated and experimental results show the possibilities of the proposal.Peer ReviewedPostprint (published version