THE APICAL POLARITY COMPLEX PROTEIN, PALS1, REGULATES CELL FATE IN THE DEVELOPMENT OF CEREBELLUM AND NEOCORTEX

Through their biased localization and function within the cell, polarity complex proteins are necessary to establish the cellular asymmetry required for tissue organization. Well-characterized germinal zones, mitogenic signals, and cell types make the cerebellum and neocortex excellent models to address the critical function of polarity complex proteins in the generation and organization of neural tissues. Here we report a focal distribution of Pals1, a central component of the apical complex, in progenitors. Our genetic analyses revealed that Pals1 deletion in the brain developed a remarkably undersized and disrupted layer structure of cerebral cortex and cerebellum. Furthermore we demonstrated that Pals1 is not only essential for brain organogenesis, but is also required for maintaining a cycling pool of progenitors in germinal zones and preventing premature differentiation. Interestingly, we did not detect profound changes in the downstream effects of well-established mitogenic/morphogenetic signaling through Shh and Notch in the Pals1 mutant. However, the localization of other apical complex proteins and tight junction proteins was severely affected by the absence of Pals1, which likely resulted in impaired cell adhesion and compromised tissue integrity. Importantly, we have found a critical function of Pals1 in regulating mitosis as Pals1 deletion causes the delay of mitotic progression and incomplete chromosome segregation. Additionally, we uncovered a crucial downstream factor mediating Pals1 function, Pttg1, which is known as an essential protein for sister chromatid segregation during mitosis. Thus, our study identifies Pals1 as a new intrinsic factor required for the proliferation and differentiation of neural progenitor cells by ensuring normal progression of mitosis

REMOTE SENSING OF WAVE DIRECTIONALITY BY TWO-DIMENSIONAL DIRECTIONAL WAVELETS: PART 1. THE DETECTION TOOLS OF DIRECTIONALITY IN SIGNALS

This paper presents the results of a study investigating methods of wave directionality based on wavelet transform. In part 1 of this paper, the theoretical background and characteristics of directional wavelet were discussed. Morlet wavelet and Cauchy wavelet were examined to test their efficiency in detection of directionality in signals. These wavelets were tested on numerical images which were considered to describe the basic characteristics of directionality of ocean waves

Design Techniques for On-Chip Global Signaling Over Lossy Transmission Lines.

This thesis describes techniques for global high-speed signaling over long (~10mm) lossy chip-serial transmission lines. With the increase in clock frequencies to multi-GHz rates, it has become impossible to move data across a die in a single clock cycle using conventional parallel bus-based communication. There are also reliability problems due to timing errors, skew, and jitter in fully synchronous systems. Noise, coupling, and inductive effects become significant for both intermediate length and global routing. A new on-chip lossy transmission line technique is developed and new driver and receiver circuitry for on-chip serial links are described. High-speed long-range serial signaling is best done over transmission lines. However, because of the relatively high sheet resistance of metal interconnect layers, on-chip transmission lines tend to be lossy. Matched termination with resistors and the proper selection of the characteristic impedance of the transmission line structure can effectively suppress ISI. Fast digital CMOS technology allows pulsed mode data drivers to operate at multi-GHz rates. A phase-tuned receiver samples and de-serializes the received signal. Since the sampling instant is tuned to match the received signal eye, there is no requirement to match the clock and signal routing or clock and signal delays. A complete self-testing on-chip transceiver communicating over a 5.8mm on-chip transmission line is implemented in 0.13um CMOS and tested. The measured BER at 9Gbps is less than 10^-10. Interleaving is usually necessary in high serial data rate serializer and de-serializer circuits. Multi-stage LC oscillators can be used to generate low phase noise multi-phases clocks required for interleaving. Conventional coupling between oscillators introduces out of phase currents, and this out of phase current causes a lower effective quality factor for each oscillator stage. However, capacitive coupling, a new technique, introduces in phase coupling between stages. Increased coupling with a ring of capacitors decreases phase spacing error dramatically and, in addition, the phase noise of multi-stages is also decreased thanks to in-phase coupling.Ph.D.Electrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/58491/1/parkjy_1.pd

REMOTE SENSING OF WAVE DIRECTIONALITY BY TWO-DIMENSIONAL DIRECTIONAL WAVELETS : PART 2. APPLICATIONS TO THE NUMERICAL AND FIELD DATA

This paper presents the results of a study investigating methods of interpretation of wave directionality based on wavelet transform. In part 1 of this paper, the tools to be used in detection of wave directionality, i. e., the Morlet and Cauchy wavelets, were described. This paper presents the application results of the directional wavelet to numerically generated images and video images taken in laboratory wave flume, river, and sea. The results showed that directional wavelet transform can be an efficient tool in detecting wave directionality with extremely low effort and cost when it is compared to traditional practices in use

Serial Magnetic Resonance Imagings of Multiple Brain Abscesses in a Patient with Pneumococcal Meningoencephalitis

We report a 43-yr-old man manifesting bacterial meningoencephalitis and multiple abscesses by Streptococcus pneumoniae. Serial magnetic resonance (MR) imagings and MR spectroscopy showed the evolution of multiple brain abscesses over 4 weeks: the enhanced rings became thicker and the dimension of whole lesions larger despite shrinkage of the ring-enhanced regions. These findings may be evidence of active inflammation working to sequestrate the lesion and protect the surrounding normal brain parenchyma from additional damage, even in the final stage of the brain abscess

Haptic Stylus and Empirical Studies on Braille, Button, and Texture Display

This paper presents a haptic stylus interface with a built-in compact tactile display module and an impact module as well as empirical studies on Braille, button, and texture display. We describe preliminary evaluations verifying the tactile display's performance indicating that it can satisfactorily represent Braille numbers for both the normal and the blind. In order to prove haptic feedback capability of the stylus, an experiment providing impact feedback mimicking the click of a button has been conducted. Since the developed device is small enough to be attached to a force feedback device, its applicability to combined force and tactile feedback display in a pen-held haptic device is also investigated. The handle of pen-held haptic interface was replaced by the pen-like interface to add tactile feedback capability to the device. Since the system provides combination of force, tactile and impact feedback, three haptic representation methods for texture display have been compared on surface with 3 texture groups which differ in direction, groove width, and shape. In addition, we evaluate its capacity to support touch screen operations by providing tactile sensations when a user rubs against an image displayed on a monitor

Innovative Wireless Power Receiver for Inductive Coupling and Magnetic Resonance Applications

This chapter presents a wireless power receiver for inductive coupling and magnetic resonance applications. The active rectifier with shared delay-locked loop (DLL) is proposed to achieve the high efficiency for different operation frequencies. In the DC–DC converter, the phase-locked loop is adopted for the constant switching frequency in the process, voltage, and temperature variation to solve the efficiency reduction problem, which results in the heat problem. An automatic mode switching between pulse width modulation and pulse frequency modulation is also adopted for the high efficiency over the wide output power. This chip is implemented using 0.18 μm BCD technology with an active area of 5.0 mm × 3.5 mm. The maximum efficiency of the active rectifier is 92%, and the maximum efficiency of the DC–DC converter is 92% when the load current is 700 mA