Architecture FPGA améliorée et flot de conception pour une reconfiguration matérielle en ligne efficace

The self-reconfiguration capabilities of modern FPGA architectures pave the way for dynamic applications able to adapt to transient events. The CAD flows of modern architectures are nowadays mature but limited by the constraints induced by the complexity of FPGA circuits. In this thesis, multiple contributions are developed to propose an FPGA architecture supporting the dynamic placement of hardware tasks. First, an intermediate representation of these tasks configuration data, independent from their final position, is presented. This representation allows to compress the task data up to 11x with regard to its conventional raw counterpart. An accompanying CAD flow, based on state-of-the-art tools, is proposed to generate relocatable tasks from a high-level description. Then, the online behavior of this mechanism is studied. Two algorithms allowing to decode and create in real-time the conventional bit-stream are described. In addition, an enhancement of the FPGA interconnection network is proposedto increase the placement flexibility of heterogeneous tasks, at the cost of a 10% increase in average of the critical path delay. Eventually, a configurable substitute to the configuration memory found in FPGAs is studied to ease their partial reconfiguration.Les capacités d'auto-reconfiguration des architectures FPGA modernes ouvrent la voie à des applications dynamiques capables d'adapter leur fonctionnement pour répondre à des évènements ponctuels. Les flots de reconfiguration des architectures commerciales sont aujourd'hui aboutis mais limités par des contraintes inhérentes à la complexité de ces circuits. Dans cette thèse, plusieurs contributions sont avancées afin de proposer une architecture FPGA reconfigurable permettant le placement dynamique de tâches matérielles. Dans un premier temps, une représentation intermédiaire des données de configuration de ces tâches, indépendante de leur positionnement final, est présentée. Cette représentation permet notamment d'atteindre des taux de compression allant jusqu'à 11x par rapport à la représentation brute d'une tâche. Un flot de conception basé sur des outils de l'état de l'art accompagne cette représentation et génère des tâches relogeables à partir d'une description haut-niveau. Ensuite, le comportement en ligne de ce mécanisme est étudié. Deux algorithmes permettant le décodage de ces tâches et la génération en temps-réel des données de configuration propres à l'architectures son décrits. Par ailleurs, une amélioration du réseau d'interconnexion d'une architecture FPGA est proposée pour accroître la flexibilité du placement de tâches hétérogènes, avec une augmentation de 10% en moyenne du délai du chemin critique. Enfin, une alternative programmable aux mémoires de configuration de ces circuits est étudiée pour faciliter leur reconfiguration partielle

Expression of myofibrillar proteins and parvalbumin isoforms in white muscle of the developing turbot <i>Scophthalmus maximus</i> (Pisces, Pleuronectiformes)

Expression of polymorphic myofibrillar and sarcoplasmic proteins was investigated in the fish Scophthalmus maximus (L.) undergoing metamorphosis. A range of electrophoretic techniques was used to monitor sequential synthesis of isoforms from hatching to the adult stage. Two isoforms (larval and adult) of myosin light chain LC2 and troponin-I were successively detected during turbot growth, in addition to variations in the peptide composition of myosin heavy chains. Two isoforms of troponin-T also appeared sequentially, but the first to make its appearance was not detected until the juvenile stage. The composition of alkali light chains, actin, tropomyosin, and troponin-C did not seem to change as the fish progressed through the different stages. Parvalbumin isoforms were isolated and their physico-chemical parameters defined. As in the other fish examined so far, there appeared a succession of larval (PA IIa and PA IIb) and adult (PA V) parvalbumin isoforms through the life of the fish. All these biochemical changes occurred gradually in the course of turbot development, and did not appear particularly related to metamorphosis but rather to physiological needs of the different growth stages

Відділення фізики і астрономії Національної академії наук України

Developmental changes in myofibrillar protein composition were investigated in the myotomal muscle of the African catfish, Heterobranchus longifilis (Clariidae), by several electrophoretic techniques. The main muscle fibres of larvae and the fast-white muscle fibres of juvenile and adult fish were found to express distinct myosin heavy chain and myosin light chain 2 (LC2) isoforms. Three myosin LC2 chains were successively detected, differing by their isoelectric points. In contrast, the alkali light chains remained qualitatively and quantitatively unchanged during fish growth. Actin, α-tropomyosin, and troponin-C (TN-C) were also similar in larval, juvenile, and adult white muscle, but an additional larval tropomyosin isoform was found in the first developmental stages. Two isoforms of troponin-T (TN-T) and troponin-I (TN-I) were synthesised in the course of fish growth. Transition from the larval to the adult isoform was much faster for TN-T than for TN-I. Slow-red muscle myofibrils from adult H. longifilis showed no common component (except actin) with larval, juvenile, or adult fast-white muscle myofibrils. Red myofibrils displayed a single TN-T and a single TN-I isoform, but two isoforms of TN-C. The myofibrillar protein isoforms synthesised at any given developmental stage almost certainly reflect changes in the functional requirements of swimming muscles in the course of fish development

Dietary creatine supplementation in gilthead seabream (Sparus aurata): comparative proteomics analysis on fish allergens, muscle quality, and liver

The quality of fish flesh depends on the skeletal muscle's energetic state and delaying energy depletion through diets supplementation could contribute to the preservation of muscle's quality traits and modulation of fish allergens. Food allergies represent a serious public health problem worldwide with fish being one of the top eight more allergenic foods. Parvalbumins, have been identified as the main fish allergen. In this study, we attempted to produce a low allergenic farmed fish with improved muscle quality in controlled artificial conditions by supplementing a commercial fish diet with different creatine percentages. The supplementation of fish diets with specific nutrients, aimed at reducing the expression of parvalbumin, can be considered of higher interest and beneficial in terms of food safety and human health. The effects of these supplemented diets on fish growth, physiological stress, fish muscle status, and parvalbumin modulation were investigated. Data from zootechnical parameters were used to evaluate fish growth, food conversion ratios and hepatosomatic index. Physiological stress responses were assessed by measuring cortisol releases and muscle quality analyzed by rigor mortis and pH. Parvalbumin, creatine, and glycogen concentrations in muscle were also determined. Comparative proteomics was used to look into changes in muscle and liver tissues at protein level. Our results suggest that the supplementation of commercial fish diets with creatine does not affect farmed fish productivity parameters, or either muscle quality. Additionally, the effect of higher concentrations of creatine supplementation revealed a minor influence in fish physiological welfare. Differences at the proteome level were detected among fish fed with different diets. Differential muscle proteins expression was identified as tropomyosins, beta enolase, and creatine kinase among others, whether in liver several proteins involved in the immune system, cellular processes, stress, and inflammation response were modulated. Regarding parvalbumin modulation, the tested creatine percentages added to the commercial diet had also no effect in the expression of this protein. The use of proteomics tools showed to be sensitive to infer about changes of the underlying molecular mechanisms regarding fish responses to external stimulus, providing a holistic and unbiased view on fish allergens and muscle quality.Project Allyfish contract MAR 16-02-01-FMP-0014 (PEP 4107IDNAD50308.12) Mar2020info:eu-repo/semantics/publishedVersio

Overdose Prevention and Naloxone Prescription for Opioid Users in San Francisco

Opiate overdose is a significant cause of mortality among injection drug users (IDUs) in the United States (US). Opiate overdose can be reversed by administering naloxone, an opiate antagonist. Among IDUs, prevalence of witnessing overdose events is high, and the provision of take-home naloxone to IDUs can be an important intervention to reduce the number of overdose fatalities. The Drug Overdose Prevention and Education (DOPE) Project was the first naloxone prescription program (NPP) established in partnership with a county health department (San Francisco Department of Public Health), and is one of the longest running NPPs in the USA. From September 2003 to December 2009, 1,942 individuals were trained and prescribed naloxone through the DOPE Project, of whom 24% returned to receive a naloxone refill, and 11% reported using naloxone during an overdose event. Of 399 overdose events where naloxone was used, participants reported that 89% were reversed. In addition, 83% of participants who reported overdose reversal attributed the reversal to their administration of naloxone, and fewer than 1% reported serious adverse effects. Findings from the DOPE Project add to a growing body of research that suggests that IDUs at high risk of witnessing overdose events are willing to be trained on overdose response strategies and use take-home naloxone during overdose events to prevent deaths

Enhanced FPGA Architecture and CAD Flow for Efficient Runtime Hardware Reconfiguration

Les capacités d'auto-reconfiguration des architectures FPGA modernes ouvrent la voie à des applications dynamiques capables d'adapter leur fonctionnement pour répondre à des évènements ponctuels. Les flots de reconfiguration des architectures commerciales sont aujourd'hui aboutis mais limités par des contraintes inhérentes à la complexité de ces circuits. Dans cette thèse, plusieurs contributions sont avancées afin de proposer une architecture FPGA reconfigurable permettant le placement dynamique de tâches matérielles. Dans un premier temps, une représentation intermédiaire des données de configuration de ces tâches, indépendante de leur positionnement final, est présentée. Cette représentation permet notamment d'atteindre des taux de compression allant jusqu'à 11x par rapport à la représentation brute d'une tâche. Un flot de conception basé sur des outils de l'état de l'art accompagne cette représentation et génère des tâches relogeables à partir d'une description haut-niveau. Ensuite, le comportement en ligne de ce mécanisme est étudié. Deux algorithmes permettant le décodage de ces tâches et la génération en temps-réel des données de configuration propres à l'architectures son décrits. Par ailleurs, une amélioration du réseau d'interconnexion d'une architecture FPGA est proposée pour accroître la flexibilité du placement de tâches hétérogènes, avec une augmentation de 10% en moyenne du délai du chemin critique. Enfin, une alternative programmable aux mémoires de configuration de ces circuits est étudiée pour faciliter leur reconfiguration partielle.The self-reconfiguration capabilities of modern FPGA architectures pave the way for dynamic applications able to adapt to transient events. The CAD flows of modern architectures are nowadays mature but limited by the constraints induced by the complexity of FPGA circuits. In this thesis, multiple contributions are developed to propose an FPGA architecture supporting the dynamic placement of hardware tasks. First, an intermediate representation of these tasks configuration data, independent from their final position, is presented. This representation allows to compress the task data up to 11x with regard to its conventional raw counterpart. An accompanying CAD flow, based on state-of-the-art tools, is proposed to generate relocatable tasks from a high-level description. Then, the online behavior of this mechanism is studied. Two algorithms allowing to decode and create in real-time the conventional bit-stream are described. In addition, an enhancement of the FPGA interconnection network is proposedto increase the placement flexibility of heterogeneous tasks, at the cost of a 10% increase in average of the critical path delay. Eventually, a configurable substitute to the configuration memory found in FPGAs is studied to ease their partial reconfiguration

Enhanced FPGA Architecture and CAD Flow for Efficient Runtime Hardware Reconfiguration

Les capacités d'auto-reconfiguration des architectures FPGA modernes ouvrent la voie à des applications dynamiques capables d'adapter leur fonctionnement pour répondre à des évènements ponctuels. Les flots de reconfiguration des architectures commerciales sont aujourd'hui aboutis mais limités par des contraintes inhérentes à la complexité de ces circuits. Dans cette thèse, plusieurs contributions sont avancées afin de proposer une architecture FPGA reconfigurable permettant le placement dynamique de tâches matérielles. Dans un premier temps, une représentation intermédiaire des données de configuration de ces tâches, indépendante de leur positionnement final, est présentée. Cette représentation permet notamment d'atteindre des taux de compression allant jusqu'à 11x par rapport à la représentation brute d'une tâche. Un flot de conception basé sur des outils de l'état de l'art accompagne cette représentation et génère des tâches relogeables à partir d'une description haut-niveau. Ensuite, le comportement en ligne de ce mécanisme est étudié. Deux algorithmes permettant le décodage de ces tâches et la génération en temps-réel des données de configuration propres à l'architectures son décrits. Par ailleurs, une amélioration du réseau d'interconnexion d'une architecture FPGA est proposée pour accroître la flexibilité du placement de tâches hétérogènes, avec une augmentation de 10% en moyenne du délai du chemin critique. Enfin, une alternative programmable aux mémoires de configuration de ces circuits est étudiée pour faciliter leur reconfiguration partielle.The self-reconfiguration capabilities of modern FPGA architectures pave the way for dynamic applications able to adapt to transient events. The CAD flows of modern architectures are nowadays mature but limited by the constraints induced by the complexity of FPGA circuits. In this thesis, multiple contributions are developed to propose an FPGA architecture supporting the dynamic placement of hardware tasks. First, an intermediate representation of these tasks configuration data, independent from their final position, is presented. This representation allows to compress the task data up to 11x with regard to its conventional raw counterpart. An accompanying CAD flow, based on state-of-the-art tools, is proposed to generate relocatable tasks from a high-level description. Then, the online behavior of this mechanism is studied. Two algorithms allowing to decode and create in real-time the conventional bit-stream are described. In addition, an enhancement of the FPGA interconnection network is proposedto increase the placement flexibility of heterogeneous tasks, at the cost of a 10% increase in average of the critical path delay. Eventually, a configurable substitute to the configuration memory found in FPGAs is studied to ease their partial reconfiguration