Pipeline quantum processor architecture for silicon spin qubits

We propose a quantum processor architecture, the qubit ‘pipeline’, in which run-time scales additively as functions of circuit depth and run repetitions. Run-time control is applied globally, reducing the complexity of control and interconnect resources. This simplification is achieved by shuttling N-qubit states through a large layered physical array of structures which realise quantum logic gates in stages. Thus, the circuit depth corresponds to the number of layers of structures. Subsequent N-qubit states are ‘pipelined’ densely through the structures to efficiently wield the physical resources for repeated runs. Pipelining thus lends itself to noisy intermediate-scale quantum (NISQ) applications, such as variational quantum eigensolvers, which require numerous repetitions of the same or similar calculations. We illustrate the architecture by describing a realisation in the naturally high-density and scalable silicon spin qubit platform, which includes a universal gate set of sufficient fidelity under realistic assumptions of qubit variability

Pipeline quantum processor architecture for silicon spin qubits

We propose a quantum processor architecture, the qubit ‘pipeline’, in which run-time scales additively as functions of circuit depth and run repetitions. Run-time control is applied globally, reducing the complexity of control and interconnect resources. This simplification is achieved by shuttling N-qubit states through a large layered physical array of structures which realise quantum logic gates in stages. Thus, the circuit depth corresponds to the number of layers of structures. Subsequent N-qubit states are ‘pipelined’ densely through the structures to efficiently wield the physical resources for repeated runs. Pipelining thus lends itself to noisy intermediate-scale quantum (NISQ) applications, such as variational quantum eigensolvers, which require numerous repetitions of the same or similar calculations. We illustrate the architecture by describing a realisation in the naturally high-density and scalable silicon spin qubit platform, which includes a universal gate set of sufficient fidelity under realistic assumptions of qubit variability

Primary thermometry of a single reservoir using cyclic electron tunneling to a quantum dot

At the nanoscale, local and accurate measurements of temperature are of particular relevance when testing quantum thermodynamical concepts or investigating novel thermal nanoelectronic devices. Here, we present a primary electron thermometer that allows probing the local temperature of a single-electron reservoir in single-electron devices. The thermometer is based on cyclic electron tunneling between a system with discrete energy levels and the reservoir. When driven at a finite rate, close to a charge degeneracy point, the system behaves like a variable capacitor whose full width at half maximum depends linearly with temperature. We demonstrate this type of thermometer using a quantum dot in a silicon nanowire transistor. We drive cyclic electron tunneling by embedding the device in a radio-frequency resonator which in turn allows reading the thermometer dispersively. Overall, the thermometer shows potential for local probing of fast heat dynamics in nanoelectronic devices and for seamless integration with silicon-based quantum circuits

Spin readout of a CMOS quantum dot by gate reflectometry and spin-dependent tunnelling

Silicon spin qubits are promising candidates for realising large scale quantum processors, benefitting from a magnetically quiet host material and the prospects of leveraging the mature silicon device fabrication industry. We report the measurement of an electron spin in a singly-occupied gate-defined quantum dot, fabricated using CMOS compatible processes at the 300 mm wafer scale. For readout, we employ spin-dependent tunneling combined with a low-footprint single-lead quantum dot charge sensor, measured using radiofrequency gate reflectometry. We demonstrate spin readout in two devices using this technique, obtaining valley splittings in the range 0.5-0.7 meV using excited state spectroscopy, and measure a maximum electron spin relaxation time ($T_1$) of $9 \pm 3$ s at 1 Tesla. These long lifetimes indicate the silicon nanowire geometry and fabrication processes employed here show a great deal of promise for qubit devices, while the spin-readout method demonstrated here is well-suited to a variety of scalable architectures

Fast Gate-Based Readout of Silicon Quantum Dots Using Josephson Parametric Amplification

Spins in silicon quantum devices are promising candidates for large-scale quantum computing. Gate-based sensing of spin qubits offers a compact and scalable readout with high fidelity, however, further improvements in sensitivity are required to meet the fidelity thresholds and measurement timescales needed for the implementation of fast feedback in error correction protocols. Here, we combine radio-frequency gate-based sensing at 622 MHz with a Josephson parametric amplifier, that operates in the 500–800 MHz band, to reduce the integration time required to read the state of a silicon double quantum dot formed in a nanowire transistor. Based on our achieved signal-to-noise ratio, we estimate that singlet-triplet single-shot readout with an average fidelity of 99.7% could be performed in 1     μ s , well below the requirements for fault-tolerant readout and 30 times faster than without the Josephson parametric amplifier. Additionally, the Josephson parametric amplifier allows operation at a lower radio-frequency power while maintaining identical signal-to-noise ratio. We determine a noise temperature of 200 mK with a contribution from the Josephson parametric amplifier (25%), cryogenic amplifier (25%) and the resonator (50%), showing routes to further increase the readout speed

Radio frequency measurements of tunnel couplings and singlet–triplet spin states in Si:P quantum dots

Spin states of the electrons and nuclei of phosphorus donors in silicon are strong candidates for quantum information processing applications given their excellent coherence times. Designing a scalable donor-based quantum computer will require both knowledge of the relationship between device geometry and electron tunnel couplings, and a spin readout strategy that uses minimal physical space in the device. Here we use radio frequency reflectometry to measure singlet–triplet states of a few-donor Si:P double quantum dot and demonstrate that the exchange energy can be tuned by at least two orders of magnitude, from 20 μeV to 8 meV. We measure dot–lead tunnel rates by analysis of the reflected signal and show that they change from 100 MHz to 22 GHz as the number of electrons on a quantum dot is increased from 1 to 4. These techniques present an approach for characterizing, operating and engineering scalable qubit devices based on donors in silicon

Unified linear response theory of quantum electronic circuits

Acknowledgements: The authors acknowledge G. Burkard and A. Pályi for useful discussions. L.P. acknowledges the UK Engineering and Physical Sciences Research Council (EPSRC) via the Cambridge NanoDTC (EP/L015978/1) and the Winton Programme for the Physics of Sustainability. M.F.G.Z. acknowledges a UKRI Future Leaders Fellowship [MR/V023284/1]. MB acknowledges funding from the Emmy Noether Programme of the German Research Foundation (DFG) under grant no. BE 7683/1-1.Funder: Winton Programme for the Physics of SustainabilityFunder: UKRI Future Leaders Fellowship [MR/V023284/1]AbstractModeling the electrical response of multi-level quantum systems at finite frequency has been typically performed in the context of two incomplete paradigms: (i) input-output theory, which is valid at any frequency but neglects dynamic losses, and (ii) semiclassical theory, which captures dynamic dissipation effects well but is only accurate at low frequencies. Here, we develop a unifying theory, valid for arbitrary frequencies, that captures both the small-signal quantum behavior and the non-unitary effects introduced by relaxation and dephasing. The theory allows a multi-level system to be described by a universal small-signal equivalent-circuit model, a resonant RLC circuit, whose topology only depends on the number of energy levels. We apply our model to a double-quantum-dot charge qubit and a Majorana qubit, showing the capability to continuously describe the systems from adiabatic to resonant and from coherent to incoherent, suggesting new and realistic experiments for improved quantum state readout. Our model will facilitate the design of hybrid quantum–classical circuits and the simulation of qubit control and quantum state readout.</jats:p

Compilation and scaling strategies for a silicon quantum processor with sparse two-dimensional connectivity

Funder: UKRI Future Leaders Fellowship (grant number MR/V023284/1)AbstractInspired by the challenge of scaling-up existing silicon quantum hardware, we propose a 2d spin-qubit architecture with low compilation overhead. The architecture is based on silicon nanowire split-gate transistors which form 1d chains of spin-qubits and allow the execution of two-qubit operations among neighbors. We introduce a silicon junction which can couple four nanowires into 2d arrangements via spin shuttling andSwapoperations. We then propose a modular sparse 2d spin-qubit architecture with unit cells of diagonally-oriented squares with nanowires along the edges and junctions on the corners. Targeting noisy intermediate-scale quantum (NISQ) demonstrators, we show that the proposed architecture allows for compilation strategies which outperform methods for 1d chains, and exhibits favorable scaling properties which enable trading-off compilation overhead and colocation of control electronics within each square by adjusting the nanowire length. An appealing feature of the proposed architecture is its manufacturability using complementary-metal-oxide-semiconductor (CMOS) fabrication processes.</jats:p

Beyond-adiabatic Quantum Admittance of a Semiconductor Quantum Dot at High Frequencies: Rethinking Reflectometry as Polaron Dynamics

Semiconductor quantum dots operated dynamically are the basis of many quantum technologies such as quantum sensors and computers. Hence, modelling their electrical properties at microwave frequencies becomes essential to simulate their performance in larger electronic circuits. Here, we develop a self-consistent quantum master equation formalism to obtain the admittance of a quantum dot tunnel-coupled to a charge reservoir under the effect of a coherent photon bath. We find a general expression for the admittance that captures the well-known semiclassical (thermal) limit, along with the transition to lifetime and power broadening regimes due to the increased coupling to the reservoir and amplitude of the photonic drive, respectively. Furthermore, we describe two new photon-mediated regimes: Floquet broadening, determined by the dressing of the QD states, and broadening determined by photon loss in the system. Our results provide a method to simulate the high-frequency behaviour of QDs in a wide range of limits, describe past experiments, and propose novel explorations of QD-photon interactions.Winton Programme for the Physics of Sustainability at Cambridge Universit

Engineering the Photoresponse of InAs Nanowires

We report on individual-InAs nanowire optoelectronic devices which can be tailored to exhibit either negative or positive photoconductivity (NPC or PPC). The NPC photoresponse time and magnitude is found to be highly tunable by varying the nanowire diameter under controlled growth conditions. Using hysteresis characterization, we decouple the observed photoexcitation-induced hot electron trapping from conventional electric field-induced trapping to gain a fundamental insight into the interface trap states responsible for NPC. Furthermore, we demonstrate surface passivation without chemical etching which both enhances the field-effect mobility of the nanowires by approximately an order of magnitude and effectively eliminates the hot carrier trapping found to be responsible for NPC, thus restoring an "intrinsic" positive photoresponse. This opens pathways toward engineering semiconductor nanowires for novel optical-memory and photodetector applications