108 research outputs found
Bell's Inequality and Entanglement in Qubits
We propose an alternative evaluation of quantum entanglement by measuring the
maximum violation of the Bell's inequality without performing a partial trace
operation. This proposal is demonstrated by bridging the maximum violation of
the Bell's inequality and the concurrence of a pure state in an -qubit
system, in which one subsystem only contains one qubit and the state is a
linear combination of two product states. We apply this relation to the ground
states of four qubits in the Wen-Plaquette model and show that they are
maximally entangled. A topological entanglement entropy of the Wen-Plaquette
model could be obtained by relating the upper bound of the maximum violation of
the Bell's inequality to the concurrences of a pure state with respect to
different bipartitions.Comment: 10 page
Implementing a Fast Unbounded Quantum Fanout Gate Using Power-Law Interactions
The standard circuit model for quantum computation presumes the ability to
directly perform gates between arbitrary pairs of qubits, which is unlikely to
be practical for large-scale experiments. Power-law interactions with strength
decaying as in the distance provide an experimentally
realizable resource for information processing, whilst still retaining
long-range connectivity. We leverage the power of these interactions to
implement a fast quantum fanout gate with an arbitrary number of targets. Our
implementation allows the quantum Fourier transform (QFT) and Shor's algorithm
to be performed on a -dimensional lattice in time logarithmic in the number
of qubits for interactions with . As a corollary, we show that
power-law systems with are difficult to simulate classically
even for short times, under a standard assumption that factoring is classically
intractable. Complementarily, we develop a new technique to give a general
lower bound, linear in the size of the system, on the time required to
implement the QFT and the fanout gate in systems that are constrained by a
linear light cone. This allows us to prove an asymptotically tighter lower
bound for long-range systems than is possible with previously available
techniques.Comment: 6 pages, 1 figur
SIMD Everywhere Optimization from ARM NEON to RISC-V Vector Extensions
Many libraries, such as OpenCV, FFmpeg, XNNPACK, and Eigen, utilize Arm or
x86 SIMD Intrinsics to optimize programs for performance. With the emergence of
RISC-V Vector Extensions (RVV), there is a need to migrate these performance
legacy codes for RVV. Currently, the migration of NEON code to RVV code
requires manual rewriting, which is a time-consuming and error-prone process.
In this work, we use the open source tool, "SIMD Everywhere" (SIMDe), to
automate the migration. Our primary task is to enhance SIMDe to enable the
conversion of ARM NEON Intrinsics types and functions to their corresponding
RVV Intrinsics types and functions. For type conversion, we devise strategies
to convert Neon Intrinsics types to RVV Intrinsics by considering the vector
length agnostic (vla) architectures. With function conversions, we analyze
commonly used conversion methods in SIMDe and develop customized conversions
for each function based on the results of RVV code generations. In our
experiments with Google XNNPACK library, our enhanced SIMDe achieves speedup
ranging from 1.51x to 5.13x compared to the original SIMDe, which does not
utilize customized RVV implementations for the conversions
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