Observations of Macroporous Gallium Nitride Electrochemically Etched from High Doped Single Crystal Wafers in HF Based Electrolytes

International audienceIn this paper, we present a process to produce porous structures by electrochemical etching of highly doped n-type GaN single crystals in aqueous HF solutions. At first, we show that we are able to perform well oriented macropores from 30% HF based solutions. To our knowledge, it's the first time that this morphology is observed in porous GaN. These macropores grow from a 5 μm thick mesoporous layer observable at the sample surface. No significant difference in term of morphology is visible for etching on Ga or N face. Moreover, the influence of the HF concentration on the morphology is also discussed

Analyse angulaire parallèle en XPS pour l’étude de la courbure de bande de la surface du GaN selon le dopage et les traitements de surface

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Systematic Study of Anodic Etching of Highly Doped N-Type 4H-SiC in Various HF Based Electrolytes

International audienceIn this paper, we study the electrochemical anodization of n-type heavily doped 4H-SiC wafers in HF based electrolytes without any UV light assistance. We present, in particular, the differences observed when varying the process conditions such as the HF concentration, the type of additive and the applied current regime. The use of a solvent such as acetic acid seems to be more suitable to produce homogeneous morphologies compared with Cetyltrimethylammonium chloride (CTAC), Ammonium dodecylsulfate (ADS), Triton X-100 surfactants. In addition, the use of pulsed current regimes improves the global homogeneity of the porous layers. Nevertheless, for some unexplained reasons, at specific concentrations of 15 and 50%, this homogeneity cannot be ensured and the observed morphology mixes mesopores and macropores with random orientations

Investigation of Direct Current Electrical Properties of Electrochemically Etched Mesoporous Silicon Carbide

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Vertical current temperature analysis of GaN-on-Si epitaxy through analytical modelling

International audienceThe current temperature dependence of a 3.9 μm GaN-on-Silicon epitaxy at temperatures ranging from 25 °C to 200 °C and for voltages beneath the plateau limited by the carrier generation in the p-doped substrate is analyzed. Based upon a fit with analytical transport models, the vertical current is reported for the first time to be the superposition of three different transport mechanisms: Recombination limited at low and middle voltages for low temperatures, Ohmic at low and middle voltages for high temperatures and Nearest Neighbor Hopping (NNH) at high voltages. Thanks to their temper-ature dependences and therefore to their energy, the transports can be related to either point defects clustered around threading dislocations or to interstitial nitrogen

On the Understanding of Cathode Related Trapping Effects in GaN-on-Si Schottky Diodes

International audienceCathode related current collapse effect in GaN on Si Schottky barrier diodes is investigated in this paper. Capacitance and current relaxation measurements on diodes and gated-Van Der Pauw are associated with temperature dependent dynamic ${R_{\mathrm{ ON}}}$ transients analysis to identify the parasitic trapping locations in the devices. We show here that the main part of the current collapse at the cathode comes from a combination of electron trapping in the passivation layer and in a carbon related trap in the GaN buffer layers ( ${E_{A}} = \mathrm {E_{T}} - {E_{V}} \simeq 0.9 \,\mathrm {eV}$ ) that can be studied independently by using the appropriate stress configurations. These two parasitic effects can lead to long recovery time (>1 ks) after reverse bias stress

On the Understanding of Cathode Related Trapping Effects in GaN-on-Si Schottky Diodes

International audienceCathode related current collapse effect in GaN on Si Schottky barrier diodes is investigated in this paper. Capacitance and current relaxation measurements on diodes and gated-Van Der Pauw are associated with temperature dependent dynamic ${R_{\mathrm{ ON}}}$ transients analysis to identify the parasitic trapping locations in the devices. We show here that the main part of the current collapse at the cathode comes from a combination of electron trapping in the passivation layer and in a carbon related trap in the GaN buffer layers ( ${E_{A}} = \mathrm {E_{T}} - {E_{V}} \simeq 0.9 \,\mathrm {eV}$ ) that can be studied independently by using the appropriate stress configurations. These two parasitic effects can lead to long recovery time (>1 ks) after reverse bias stress

Y-Function Based Methodology for Accurate Statistical Extraction of HEMT Device Parameters for GaN Technology

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Deep Insights into Recessed Gate MOS-HEMT Technology for Power Applications

International audienceIn this paper, we present a general overview of AIGaN/GaN MOS channel High Electron Mobility Transistor (HEMTs) with fully recessed gate architecture fabricated on 200mm Si-wafer. Specifically, an insight on its benefits compared to market competitors is brought out respectively from transistor electrical characteristics to robustness behavioral aspects