New Figure-of-Merit Combining Semiconductor and Multi-Level Converter Properties

Figures-of-Merit (FOMs) are widely-used to compare power semiconductor materials and devices and to motivate research and development of new technology nodes. These material- and device-specific FOMs, however, fail to directly translate into quantifiable performance in a specific power electronics application. Here, we combine device performance with specific bridge-leg topologies to propose the extended FOM, or X-FOM, a Figure-of-Merit that quantifies bridge-leg performance in multi-level (ML) topologies and supports the quantitative comparison and optimization of topologies and power devices. To arrive at the proposed X-FOM, we revisit the fundamental scaling laws of the on-state resistance and output capacitance of power semiconductors to first propose a revised device-level semiconductor Figure-of-Merit (D-FOM). The D-FOM is then generalized to a multi-level topology with an arbitrary number of levels, output power, and input voltage, resulting in the X-FOM that quantitatively compares hard-switched semiconductor stage losses and filter stage requirements across different bridge-leg structures and numbers of levels, identifies the maximum achievable efficiency of the semiconductor stage, and determines the loss-optimal combination of semiconductor die area and switching frequency. To validate the new X-FOM and showcase its utility, we perform a case study on candidate bridge-leg structures for a three-phase 10 kW photovoltaic (PV) inverter, with the X-FOM showing that (a) the minimum hard-switching losses are an accurate approximation to predict the theoretically maximum achievable efficiency and relative performance between bridge-legs and (b) the 3-level bridge-leg outperforms the 2-level configuration, despite utilizing a SiC MOSFET with a lower D-FOM than in the 2-level case.ISSN:2644-131

Single-Phase PFC Rectifier With Integrated Flying Capacitor Power Pulsation Buffer

Single-phase Power Factor Correction (PFC) rectifiers with sinusoidal grid currents are inherently subject to an input power fluctuating at twice the mains frequency. In order to potentially mitigate bulky, heavy and failure-prone electrolytic dc-link capacitors, active Power Pulsation Buffer (PPB) concepts are proposed in the literature. For converter systems employing Flying Capacitor (FC) multilevel bridge-legs, the FCs can be utilized as a twice-mains frequency energy storage, i.e., as an integrated active PPB without the need for additional power components. Such ac-dc-stage-integrated FC PPBs capable of buffering the complete input power variation are known in literature which, however, require sophisticated control strategies with varying switching frequency and discontinuous conduction mode. This paper presents a novel ac-dc-stage-integrated FC-PPB approach which is compatible with standard PFC control concepts and enables a significant reduction in dc-link voltage variation. First, a control concept cycling the FC voltage in a wide range without interfering with the grid current controller is derived step by step and verified by means of circuit simulations. Design guidelines for the calculation of suitable FC capacitance values are presented and the limits in buffering capability are discussed. The concept is then experimentally verified with a 2.2 kW three-level FC single-phase PFC rectifier employing 600 V GaN power semiconductors where the dc-link voltage variation is reduced by 28% compared to conventional operation. Last, the applicability of the ac-dc-stage-integrated FC-PPB concept to other FC converter topologies is discussed.ISSN:2644-131

All-SiC 99.4%-efficient three-phase T-type inverter with DC-side common-mode filter

This letter presents a hardware demonstrator of an all-SiC three-level T-type (3LTT) inverter with the common-mode (CM) EMI filter stages placed on the DC input instead of the AC output side, targeting, for example, high-efficiency PV applications. The extensive experimental characterization shows that state-of-the-art SiC transistors and a DC-side CM filter enable an unprecedented peak/full-load efficiency of 99.4% (calorimetric measurement) at 12.5 kW and a power density of 2.4 kW/dm(3) (39 W/in(3)). The demonstrator fulfills CISPR 11 Class A EMI regulations as well as upcoming EMI standards for the frequency range of 9-150 kHz. Compared to other high-efficiency converters, which often employ bridge legs with more output voltage levels, the described 3LTT concept thus offers a very favorable trade-off between complexity and performance.ISSN:0013-5194ISSN:1350-911XISSN:0013-51

Novel ZVS S-TCM Modulation of Three-Phase AC/DC Converters

For three-phase AC-DC power conversion, the widely-used continuous current mode (CCM) modulation scheme results in relatively high semiconductor losses from hard-switching each device during half of the mains cycle. Triangular current mode (TCM) modulation, where the inductor current reverses polarity before turn-off, achieves zero-voltage-switching (ZVS) but at the expense of a wide switching frequency variation (15× for the three-phase design considered here), complicating filter design and compliance with EMI regulations. In this paper, we propose a new modulation scheme, sinusoidal triangular current mode (S-TCM), that achieves soft-switching, keeps the maximum switching frequency below the 150 kHz EMI regulatory band, and limits the switching frequency variation to only 3×. Under S-TCM, three specific modulation schemes are analyzed, and a loss-optimized weighting of the current bands across load is identified. The 2.2 kW S-TCM phase-leg hardware demonstrator achieves 99.7% semiconductor efficiency, with the semiconductor losses accurately analytically estimated within 10% (0.3 W). Relative to a CCM design, the required filter inductance is 6× lower, the inductor volume is 37% smaller, and the semiconductor losses are 55% smaller for a simultaneous improvement in power density and efficiency.ISSN:2644-131

Conceptualization and Analysis of a Next-Generation Ultra-Compact 1.5-kW PCB-Integrated Wide-Input-Voltage-Range 12V-Output Industrial DC/DC Converter Module

The next-generation industrial environment requires power supplies that are compact, efficient, low-cost, and ultra-reliable, even across mains failures, to power mission-critical electrified processes. Hold-up time requirements and the demand for ultra-high power density and minimum production costs, in particular, drive the need for power converters with (i) a wide input voltage range, to reduce the size of the hold-up capacitor, (ii) soft-switching over the full input voltage and load ranges, to achieve low losses that facilitate a compact realization, and (iii) complete PCB-integration for low-cost manufacturing. In this work, we conceptualize, design, model, fabricate, and characterize a 1.5 kW, 12 V-output DC/DC converter for industrial power supplies that is required to operate across a wide 300 V–430 V input voltage range. This module utilizes an LLC-based control scheme for complete soft-switching and a snake-core transformer to divide the output current with a balanced flux among multiple secondary windings. Detailed loss models are derived for every component in the converter. The converter achieves close to 96% peak efficiency with a power density of 337 W in−3 (20.6 kW/dm−3), excellent matching to the derived loss models, and zero-voltage switching even down to zero load. The loss models are used to identify improvements to further boost efficiency, the most important of which is the minimization of delay times in synchronous rectification, and a subsequent improved 1.5 kW hardware module eliminates nearly 25% of converter losses for a peak efficiency of nearly 97% with a power density of 308 W in−3 (18.8 kW dm−3). Two 1.5 kW modules are then paralleled to achieve 3 kW output power at 12 V and 345 W in−3 (21.1 kW dm−3) with ideal current sharing between the secondary outputs and no drop in efficiency from a single module, an important characteristic enabled by the novel snake-core transformer.ISSN:2079-929