Area-Efficient Hardware Implementation of the Optimal Ate Pairing over BN curves.

To have an efficient asymmetric key encryption scheme such as elliptic curves, hyperelliptic curves, pairing etc., we have to go through an arithmetic optimization then a hardware one. Taking into consideration restricted environments’ compromises, we should strike a balance between efficiency and memory resources. For this reason, we studied the mathematical aspect of pairing computation and gave new development of the methods that compute the hard part of the final exponentiation in [2]. They prove that these new methods save an important number of temporary variables, and they are certainly faster than the existing one. In this paper, we will also present a new way of computing Miller loop, more precisely in the doubling algorithm. So we will use this result and the arithmetic optimization presented in [2]. Then, we will apply hardware optimization to find a satisfactory design which give the best compromise between area occupation and execution time. Our hardware implementation on a Virtex-6 FPGA(XC6VHX250T) used only 5976 Slices, 30 DSP, which is less resources used compared with state-ofthe-art hardware implementations, so we can say that our approach cope with the limited resources of restricted environmen

Implementation of the One Health approach to fight arbovirus infections in the Mediterranean and Black Sea Region: Assessing integrated surveillance in Serbia, Tunisia and Georgia

Background In the Mediterranean and Black Sea Region, arbovirus infections are emerging infectious diseases. Their surveillance can benefit from one health inter-sectoral collaboration; however, no standardized methodology exists to study One Health surveillance. Methods We designed a situation analysis study to document how integration of laboratory/clinical human, animal and entomological surveillance of arboviruses was being implemented in the Region. We applied a framework designed to assess three levels of integration: policy/institutional, data collection/data analysis and dissemination. We tested the use of Business Process Modelling Notation (BPMN) to graphically present evidence of inter-sectoral integration. Results Serbia, Tunisia and Georgia participated in the study. West Nile Virus surveillance was analysed in Serbia and Tunisia, Crimea-Congo Haemorrhagic Fever surveillance in Georgia. Our framework enabled a standardized analysis of One Health surveillance integration, and BPMN was easily understandable and conducive to detailed discussions among different actors/institutions. In all countries, we observed integration across sectors and levels except in data collection and data analysis. Data collection was interoperable only in Georgia without integrated analysis. In all countries, surveillance was mainly oriented towards outbreak response, triggered by an index human case. Discussion The three surveillance systems we observed prove that integrated surveillance can be operationalized with a diverse spectrum of options. However, in all countries, the integrated use of data for early warning and inter-sectoral priority setting is pioneeristic. We also noted that early warning before human case occurrence is recurrently not operationally prioritized

Design And Implementation of Low Area/Power Elliptic Curve Digital Signature Hardware Core

The Elliptic Curve Digital Signature Algorithm(ECDSA) is the analog to the Digital Signature Algorithm(DSA). Based on the elliptic curve, which uses a small key compared to the others public-key algorithms, ECDSA is the most suitable scheme for environments where processor power and storage are limited. This paper focuses on the hardware implementation of the ECDSA over elliptic curveswith the 163-bit key length recommended by the NIST (National Institute of Standards and Technology). It offers two services: signature generation and signature verification. The proposed processor integrates an ECC IP, a Secure Hash Standard 2 IP (SHA-2 Ip) and Random Number Generator IP (RNG IP). Thus, all IPs will be optimized, and different types of RNG will be implemented in order to choose the most appropriate one. A co-simulation was done to verify the ECDSA processor using MATLAB Software. All modules were implemented on a Xilinx Virtex 5 ML 50 FPGA platform; they require respectively 9670 slices, 2530 slices and 18,504 slices. FPGA implementations represent generally the first step for obtaining faster ASIC implementations. Further, the proposed design was also implemented on an ASIC CMOS 45-nm technology; it requires a 0.257 mm2 area cell achieving a maximum frequency of 532 MHz and consumes 63.444 (mW). Furthermore, in this paper, we analyze the security of our proposed ECDSA processor against the no correctness check for input points and restart attacks

Statistical Analysis and Security Evaluation of Chaotic RC5-CBC Symmetric Key Block Cipher Algorithm

International audienceIn some previous research works, it has been theoretically proven that RC5-CBC encryption algorithm behaves as a Devaney topological chaos dynamical system. This unpre-dictable behavior has been experimentally illustrated through such sensitivity tests analyses encompassing the avalanche effect phenomenon evaluation. In this paper, which is an extension of our previous work, we aim to prove that RC5 algorithm can guarantee a much better level of security and randomness while behaving chaotically, namely when embedded with CBC mode of encryption. To do this, we have began by evaluating the quality of such images encrypted under chaotic RC5-CBC symmetric key encryption algorithm. Then, we have presented the synthesis results of an hardware architecture that implements this chaotic algorithm in FPGA circuits

Fast Constant-Time Modular Inversion over <inline-formula><math display="inline"><semantics><mrow><msub><mi mathvariant="double-struck">F</mi><mi>p</mi></msub></mrow></semantics></math></inline-formula> Resistant to Simple Power Analysis Attacks for IoT Applications

The advent of the Internet of Things (IoT) has enabled millions of potential new uses for consumers and businesses. However, with these new uses emerge some of the more pronounced risks in the connected object domain. Finite fields play a crucial role in many public-key cryptographic algorithms (PKCs), which are used extensively for the security and privacy of IoT devices, consumer electronic equipment, and software systems. Given that inversion is the most sensitive and costly finite field arithmetic operation in PKCs, this paper proposes a new, fast, constant-time inverter over prime fields Fp based on the traditional Binary Extended Euclidean (BEE) algorithm. A modified BEE algorithm (MBEEA) resistant to simple power analysis attacks (SPA) is presented, and the design performance area-delay over Fp is explored. Furthermore, the BEE algorithm, modular addition, and subtraction are revisited to optimize and balance the MBEEA signal flow and resource utilization efficiency. The proposed MBEEA architecture was implemented and tested on Xilinx FPGA Virtex #5, #6, and #7 devices. Our implementation over Fp (length of p = 256 bits) with 2035 slices achieved one modular inversion in only 1.12 μs on Virtex-7. Finally, we conducted a thorough comparison and performance analysis to demonstrate that the proposed design outperforms the competing designs, i.e., has a lower area-delay product (ADP) than the reported inverters

High speed and efficient area optimal ate pairing processor implementation over BN and BLS12 curves on FPGA

International audienc

Risk based serological survey of Rift Valley fever in Tunisia (2017–2018)

Rift Valley fever (RVF) has been reported in the sub-Saharan region of Africa, Egypt and Arabian Peninsula - Yemen and Saudi Arabia, over the past 20 years and is a threat to both the animal and human populations in Tunisia. Tunisia is considered as a high-risk country for the introduction of RVF due to the informal movements of diseased animals already reported in the neighboring countries. The objective of this study was to assess the status of RVF in small ruminants and camels in Tunisia. A risk-based serological survey was conducted to evaluate the presence of RVF based on spatial qualitative risk analysis (SQRA). Samples were collected from small ruminants (sheep and goats) (n = 1,114), and camels (n = 173) samples, belonging to 18 breeders in 14 governorates between November 2017 and January 2018. Samples were tested using an RVF specific multispecies competitive ELISA. Out of the 1,287 samples tested for the presence of RVF IgG antibodies by ELISA, only one positive sample 0.07% (1/1 287) was detected but not confirmed with the virus neutralization test (VNT) used for confirmation. So far, no RVF outbreaks have been reported in Tunisia and our study confirmed the absence of RVF in livestock up to January 2018. Further investigations are needed to confirm the RVF-free status of Tunisia today