Kinetics of Si and Ge nanowires growth through electron beam evaporation

Si and Ge have the same crystalline structure, and although Si-Au and Ge-Au binary alloys are thermodynamically similar (same phase diagram, with the eutectic temperature of about 360°C), in this study, it is proved that Si and Ge nanowires (NWs) growth by electron beam evaporation occurs in very different temperature ranges and fluence regimes. In particular, it is demonstrated that Ge growth occurs just above the eutectic temperature, while Si NWs growth occurs at temperature higher than the eutectic temperature, at about 450°C. Moreover, Si NWs growth requires a higher evaporated fluence before the NWs become to be visible. These differences arise in the different kinetics behaviors of these systems. The authors investigate the microscopic growth mechanisms elucidating the contribution of the adatoms diffusion as a function of the evaporated atoms direct impingement, demonstrating that adatoms play a key role in physical vapor deposition (PVD) NWs growth. The concept of incubation fluence, which is necessary for an interpretation of NWs growth in PVD growth conditions, is highlighted

Heteroepitaxial Growth of Ge Nanowires on Si Substrates

Electron beam evaporation has been used to prepare Ge nanowires (NWs) on top of (111) Si substrates. Despite the non-UHV growth conditions, scanning and transmission electron microscopies demonstrate that NWs are single crystal with specific crystallographic growth directions ([111], [110], and [112]). NWs are faceted, exhibiting the lower energy plans on the surface. The faceting depends on the growth direction. Moreover, the detrimental effects for Ge NWs growth of O atoms contamination are discussed. Finally, we describe how a proper preparation of the Au catalyst is able to increase the Ge NW density by a factor of 4, while heteroepitaxy and faceting features are maintained

Photonic Torque Microscopy of the Nonconservative Force Field for Optically Trapped Silicon Nanowires

We measure, by photonic torque microscopy, the nonconservative rotational motion arising from the transverse components of the radiation pressure on optically trapped, ultrathin silicon nanowires. Unlike spherical particles, we find that nonconservative effects have a significant influence on the nanowire dynamics in the trap. We show that the extreme shape of the trapped nanowires yields a transverse component of the radiation pressure that results in an orbital rotation of the nanowire about the trap axis. We study the resulting motion as a function of optical power and nanowire length, discussing its size-scaling behavior. These shape-dependent nonconservative effects have implications for optical force calibration and optomechanics with levitated nonspherical particles

Metal Nanoparticles Deposited on Porous Silicon Templates as Novel Substrates for SERS

In this paper, results on preparation of stable and uniform SERS solid substrates using macroporous silicon (pSi) with deposited silver and gold are presented. Macroporous silicon is produced by anodisation of p-type silicon in hydrofluoric acid. The as prepared pSi is then used as a template for Ag and Au depositions. The noble metals were deposited in three different ways: by immersion in silver nitrate solution, by drop-casting silver colloidal solution and by pulsed laser ablation (PLA). Substrates obtained by different deposition processes were evaluated for SERS efficiency using methylene blue (MB) and rhodamine 6G (R6G) at 514.5, 633 and 785 nm. Using 514.5 nm excitation and R6G the limits of detection (LOD) for macroporous Si samples with noble metal nanostructures obtained by immersion of pSi sample in silver nitrate solution and by applying silver colloidal solution to pSi template were 10–9 M and 10–8 M respectively. Using 633 nm laser and MB the most noticeable SERS activity gave pSi samples ablated with 30000 and 45000 laser pulses where the LODs of 10–10 M were obtained. The detection limit of 10–10 M was also reached for 4 mA cm–2-15 min pSi sample, silver ablated with 30000 pulses. Macroporous silicon proved to be a good base for the preparation of SERS substrates

Defect level characterization of silicon nanowire arrays: Towards novel experimental paradigms

The huge amount of knowledge, and infrastructures, brought by silicon (Si) technology, make Si Nanowires (NWs) an ideal choice for nano-electronic Si-based devices. This, in turn, challenges the scientific research to adapt the technical and theoretical paradigms, at the base of established experimental techniques, in order to probe the properties of these systems. Metal-assisted wet-Chemical Etching (MaCE) [1, 2] is a promising fast, easy and cheap method to grow high aspect-ratio aligned Si NWs. Further, contrary to other fabrication methods, this method avoids the possible detrimental effects related to Au diffusion into NWs. We investigated the bandgap level diagram of MaCE Si NW arrays, phosphorous-doped, by means of Deep Level Transient Spectroscopy. The presence of both shallow and deep levels has been detected. The results have been examined in the light of the specificity of the MaCE growth. The study of the electronic levels in Si NWs is, of course, of capital importance in view of the integration of Si NW arrays as active layers in actual devices

Kinetics of Si and Ge nanowires growth through electron beam evaporation

<p>Abstract</p> <p>Si and Ge have the same crystalline structure, and although Si-Au and Ge-Au binary alloys are thermodynamically similar (same phase diagram, with the eutectic temperature of about 360&#176;C), in this study, it is proved that Si and Ge nanowires (NWs) growth by electron beam evaporation occurs in very different temperature ranges and fluence regimes. In particular, it is demonstrated that Ge growth occurs just above the eutectic temperature, while Si NWs growth occurs at temperature higher than the eutectic temperature, at about 450&#176;C. Moreover, Si NWs growth requires a higher evaporated fluence before the NWs become to be visible. These differences arise in the different kinetics behaviors of these systems. The authors investigate the microscopic growth mechanisms elucidating the contribution of the adatoms diffusion as a function of the evaporated atoms direct impingement, demonstrating that adatoms play a key role in physical vapor deposition (PVD) NWs growth. The concept of incubation fluence, which is necessary for an interpretation of NWs growth in PVD growth conditions, is highlighted.</p

Properties of Si nanowires as a function of their growth conditions

Silicon nanowires physical properties strongly depend on their growth conditions, as already assessed. We report on the electrical properties of nanowires (NWs) grown by the vapor–liquid–solid (VLS) mechanism, one of the most established for NW growth, and by the more recent metal-assisted wet chemical etching (MaCE).Wet etching growth process promises to be an industrial advantageous way for growing Si NWs, because of its cheapness, fastness, relative easiness. The electronic level scheme in VLS grown, boron (B)- and phosphorus (P)-doped NWs has been experimentally investigated. We have demonstrated that the doping impurities induce the same shallow levels as in bulk silicon. The presence of two donor levels in the lower half-bandgap is also revealed, which has been successfully related to VLS growth details. We report, also, on the first results on the physical properties of Si NW arrays grown by MaCE, and compare them to those of VLS grown Si NWs

Impact of Processing Conditions on the Level Scheme of Silicon Nanowires Synthesized by Top-Down Techniques

Massive and reliable synthesis of semiconductor NWs is an essential pre-requisite for the stepping out from the proof-of-concept stage towards real-world manufacturing of NW-based devices. In this respect it becomes of main concern to answer the question of how growth conditions could introduce point and/or extended defects into NW inner structures, mirroring themselves into the NW level schemes, and finally affecting NW-based device performances. We report here on the investigation of electrically active defects of Si NWs fabricated by two different top-down techniques, Reactive Ion Etching (RIE) [1] (Fig. 1a) and Metal-Assisted wet Chemical Etching (MaCE) [2] (Fig1b), by means of Deep Level Transient Spectroscopy (DLTS). Our studies reveal the existence of intra-gap levels induced during the Si NWs growth in both cases. We discuss their origin in cross-reference with the different physical mechanisms underlying the samples\u2019 processing features. Differently from the case of MaCE Si NWs, the low density of RIE etched Si NWs has led us to develop a procedure in order to realize the Schottky barrier junction which is the conditio-sine-qua-non for performing DLTS characterization. Since the same procedure can be adopted for DLTS-probing of NW arrays under every density condition, this in turn opens the way to the systematic study of electrically active defects in semiconductor NWs by means of the sophisticated DLTS technique, of far-reaching consequence about defect characterization in semiconductor NWs. [1] S. Leopold et al., J. Vac. Sci. Technol. B, 29, 011002 (2011). [2] A. Irrera et al., Nanotechnology, 23, 075204 (2012)

CMOS-Compatible and Low-Cost Thin Film MACE Approach for Light-Emitting Si NWs Fabrication

Silicon nanowires (Si NWs) are emerging as an innovative building block in several fields, such as microelectronics, energetics, photonics, and sensing. The interest in Si NWs is related to the high surface to volume ratio and the simpler coupling with the industrial flat architecture. In particular, Si NWs emerge as a very promising material to couple the light to silicon. However, with the standard synthesis methods, the realization of quantum-confined Si NWs is very complex and often requires expensive equipment. Metal-Assisted Chemical Etching (MACE) is gaining more and more attention as a novel approach able to guarantee high-quality Si NWs and high density with a cost-effective approach. Our group has recently modified the traditional MACE approach through the use of thin metal films, obtaining a strong control on the optical and structural properties of the Si NWs as a function of the etching process. This method is Complementary Metal-Oxide-Semiconductors (CMOS)-technology compatible, low-cost, and permits us to obtain a high density, and room temperature light-emitting Si NWs due to the quantum confinement effect. A strong control on the Si NWs characteristics may pave the way to a real industrial transfer of this fabrication methodology for both microelectronics and optoelectronics applications