On Karatsuba's Problem Concerning the Divisor Function τ(n)\tau(n)

We study an asymptotic behavior of the sum \sum\limits_{n\le x}\frac{\D \tau(n)}{\D \tau(n+a)}. Here $\tau(n)$ denotes the number of divisors of $n$ and $a\ge 1$ is a fixed integer.Comment: 32 page

Characterizing Interstate Crash Rates Based on Traffic Congestion Using Probe Vehicle Data

Crash reduction factors are widely used by engineers for prioritizing safety investments. Work zones are routinely analyzed by the length and duration of queues. Queue detection warning technology has been growing in availability and reliability in recent years. However, there is sparse literature on the impact of freeway queueing on crash rates. This paper analyzes three years of crash data and crowd-sourced probe vehicle data to classify crashes as being associated with queueing conditions or free flow conditions. In 2014, only 1.2% of the distanced-weighted hours of operation of Indiana interstates operated at or under 45 MPH. A three-year study on Indiana interstates indicates that commercial vehicles were involved in over 87% of back-of-queue fatal crashes compared to 39% of all fatal crashes during free flow conditions. A new measure of crash rate was developed to account for the presence and duration of queues: crashes per mile-hour of congestion. The congested crash rate on all Indiana interstates in 2014 was found to be 24 times greater than the uncongested crash rate. These data were also separated into both rural and urban categories. In rural areas, the congested crash rate is 23 times the uncongested crash rate. In urban areas, the congested crash rate is 21 times the uncongested crash rate. Queues are found to be present for five minutes or longer prior to approximately 90% of congestion crashes in 2014. Longer term, this information shows the importance in the development of technology that can warn motorists of traffic queues

Energy-efficient software implementation of long integer modular arithmetic

This paper investigates performance and energy characteristics of software algorithms for long integer arithmetic. We analyze and compare the number of RISC-like processor instructions (e.g. single-precision multiplication, addition, load, and store instructions) required for the execution of different algorithms such as Schoolbook multiplication, Karatsuba and Comba multiplication, as well as Montgomery reduction. Our analysis shows that a combination of Karatsuba-Comba multiplication and Montgomery reduction (the so-called KCM method) allows to achieve better performance than other algorithms for modular multiplication. Furthermore, we present a simple model to compare the energy-efficiency of arithmetic algorithms. This model considers the clock cycles and average current consumption of the base instructions to estimate the overall amount of energy consumed during the execution of an algorithm. Our experiments, conducted on a StrongARM SA-1100 processor, indicate that a 1024-bit KCM multiplication consumes about 22% less energy than other modular multiplication techniques

New Speed Records for Montgomery Modular Multiplication on 8-bit AVR Microcontrollers

Abstract. Modular multiplication of large integers is a performancecritical arithmetic operation of many public-key cryptosystems such as RSA, DSA, Diffie-Hellman (DH) and their elliptic curve-based variants ECDSA and ECDH. The computational cost of modular multiplication and related operations (e.g. exponentiation) poses a practical challenge to the widespread deployment of public-key cryptography, especially on embedded devices equipped with 8-bit processors (smart cards, wireless sensor nodes, etc.). In this paper, we describe basic software techniques to improve the performance of Montgomery modular multiplication on 8-bit AVR-based microcontrollers. First, we present a new variant of the widely-used hybrid method for multiple-precision multiplication that is 10.6 % faster than the original hybrid technique of Gura et al. Then, we discuss different hybrid Montgomery multiplication algorithms, including Hybrid Finely Integrated Product Scanning (HFIPS), and introduce a novel approach for Montgomery multiplication, which we call Hybrid Separated Product Scanning (HSPS). Finally, we show how to perform the modular subtraction of Montgomery reduction in a regular fashion without execution of conditional statements so as to counteract Simple Power Analysis (SPA) attacks. Our AVR implementation of the HFIPS and HSPS method outperforms the Montgomery multiplication of the MIRACL Crypto SDK by up to 21.58 % and 14.24%, respectively, and is twice as fast as the modular multiplication of the TinyECC library