285 research outputs found

    Solid State Circuits Technologies

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    The evolution of solid-state circuit technology has a long history within a relatively short period of time. This technology has lead to the modern information society that connects us and tools, a large market, and many types of products and applications. The solid-state circuit technology continuously evolves via breakthroughs and improvements every year. This book is devoted to review and present novel approaches for some of the main issues involved in this exciting and vigorous technology. The book is composed of 22 chapters, written by authors coming from 30 different institutions located in 12 different countries throughout the Americas, Asia and Europe. Thus, reflecting the wide international contribution to the book. The broad range of subjects presented in the book offers a general overview of the main issues in modern solid-state circuit technology. Furthermore, the book offers an in depth analysis on specific subjects for specialists. We believe the book is of great scientific and educational value for many readers. I am profoundly indebted to the support provided by all of those involved in the work. First and foremost I would like to acknowledge and thank the authors who worked hard and generously agreed to share their results and knowledge. Second I would like to express my gratitude to the Intech team that invited me to edit the book and give me their full support and a fruitful experience while working together to combine this book

    Characterisation of organometallic materials for IC process

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    Investigation of different dielectric materials as gate insulator for MOSFETs

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    The scaling of semiconductor transistors has led to a decrease in thickness of the silicon dioxide layer used as gate dielectric. The thickness of the silicon dioxide layer is reduced to increase the gate capacitance, thus increasing the drain current. If the thickness of the gate dielectric decreases below 2nm, the leakage current due to the tunneling increases drastically. Hence it is necessary to replace the gate dielectric, silicon dioxide, with a physically thicker oxide layer of high-k materials like Hafnium oxide and Titanium oxide. High-k dielectric materials allow the capacitance to increase without a huge leakage current. Hafnium oxide and Titanium oxide films are deposited by reactive magnetron sputtering from Hafnium and Titanium targets respectively. These oxide layers are used to create metal-insulator-metal (MIM) structures using aluminum as the top and bottom electrodes. The films are deposited at various O2/Ar gas flow ratios, substrate temperatures, and process pressures. After attaining an exact recipe for these oxide layers that exhibit the desired parameters, MOS capacitors are fabricated with n-Si and p-Si substrates having aluminum electrodes at the top and bottom of each. Comparing the parameters of Hafnium oxide- and Titanium oxide- based MOS capacitors, MOSFET devices are designed with Hafnium oxide as gate dielectric

    The Fabrication and Evaluation of Silicon MOSFETs With 0.5 to 0.1 Micron Gate Lengths

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    This Thesis describes the application of high resolution electron beam lithography and dry etching techniques to the fabrication of experimental silicon MOSFETs with sub 0.5 micron gate lengths. HRN, a negative electron beam resist is investigated and demonstrated to have a resolution of 0.1 microns. Two alternative dry etching processes are reported for patterning 0.1 micron polysilicon gate electrodes using HRN masking. The first process uses chlorine plasma etching whilst the second process uses silicon tetrachloride reactive ion etching. MOSFET scaling theory is introduced and then used as a guide for designing the experimental sub 0.5 micron devices. A full processing sequence is developed for fabricating the experimental devices. This process includes self-aligned ion implantation and rapid thermal annealing steps, to form the shallow source and drain drift regions. Devices with gate oxide thicknesses of 150 angstroms and channel doping levels in the range from 3x10e16 to 1.2x10e18 atoms/cm3 have been implemented. Electrical measurements are reported for the range of devices which have been fabricated. Results are included for MOSFETs with gate lengths of only 0.11 microns. At a channel doping level of 1.2x10e18 atoms/cm3 the 0.11 micron devices exhibit a transconductance of 70 mS/mm. A slightly modified process is described which has been used to implement a second set of sub 0.5 micron devices together with 19 stage unloaded n-MOS ring oscillator circuits. Preliminary high speed measurements are reported for these circuits which have gate lengths of 0.23 microns. Minimum stage delays of 80 psec have been achieved with a corresponding power-delay product of 210 fJ

    An Optoelectronic Stimulator for Retinal Prosthesis

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    Retinal prostheses require the presence of viable population of cells in the inner retina. Evaluations of retina with Age-Related Macular Degeneration (AMD) and Retinitis Pigmentosa (RP) have shown a large number of cells remain in the inner retina compared with the outer retina. Therefore, vision loss caused by AMD and RP is potentially treatable with retinal prostheses. Photostimulation based retinal prostheses have shown many advantages compared with retinal implants. In contrary to electrode based stimulation, light does not require mechanical contact. Therefore, the system can be completely external and not does have the power and degradation problems of implanted devices. In addition, the stimulating point is flexible and does not require a prior decision on the stimulation location. Furthermore, a beam of light can be projected on tissue with both temporal and spatial precision. This thesis aims at fi nding a feasible solution to such a system. Firstly, a prototype of an optoelectronic stimulator was proposed and implemented by using the Xilinx Virtex-4 FPGA evaluation board. The platform was used to demonstrate the possibility of photostimulation of the photosensitized neurons. Meanwhile, with the aim of developing a portable retinal prosthesis, a system on chip (SoC) architecture was proposed and a wide tuning range sinusoidal voltage-controlled oscillator (VCO) which is the pivotal component of the system was designed. The VCO is based on a new designed Complementary Metal Oxide Semiconductor (CMOS) Operational Transconductance Ampli er (OTA) which achieves a good linearity over a wide tuning range. Both the OTA and the VCO were fabricated in the AMS 0.35 µm CMOS process. Finally a 9X9 CMOS image sensor with spiking pixels was designed. Each pixel acts as an independent oscillator whose frequency is controlled by the incident light intensity. The sensor was fabricated in the AMS 0.35 µm CMOS Opto Process. Experimental validation and measured results are provided

    Advances in Solid State Circuit Technologies

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    This book brings together contributions from experts in the fields to describe the current status of important topics in solid-state circuit technologies. It consists of 20 chapters which are grouped under the following categories: general information, circuits and devices, materials, and characterization techniques. These chapters have been written by renowned experts in the respective fields making this book valuable to the integrated circuits and materials science communities. It is intended for a diverse readership including electrical engineers and material scientists in the industry and academic institutions. Readers will be able to familiarize themselves with the latest technologies in the various fields

    Low Power Adaptive Circuits: An Adaptive Log Domain Filter and A Low Power Temperature Insensitive Oscillator Applied in Smart Dust Radio

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    This dissertation focuses on exploring two low power adaptive circuits. One is an adaptive filter at audio frequency for system identification. The other is a temperature insensitive oscillator for low power radio frequency communication. The adaptive filter is presented with integrated learning rules for model reference estimation. The system is a first order low pass filter with two parameters: gain and cut-off frequency. It is implemented using multiple input floating gate transistors to realize online learning of system parameters. Adaptive dynamical system theory is used to derive robust control laws in a system identification task. Simulation results show that convergence is slower using simplified control laws but still occurs within milliseconds. Experimental results confirm that the estimated gain and cut-off frequency track the corresponding parameters of the reference filter. During operation, deterministic errors are introduced by mismatch within the analog circuit implementation. An analysis is presented which attributes the errors to current mirror mismatch. The harmonic distortion of the filter operating in different inversion is analyzed using EKV model numerically. The temperature insensitive oscillator is designed for a low power wireless network. The system is based on a current starved ring oscillator implemented using CMOS transistors instead of LC tank for less chip area and power consumption. The frequency variance with temperature is compensated by the temperature adaptive circuits. Experimental results show that the frequency stability from 5°C to 65°C has been improved 10 times with automatic compensation and at least 1 order less power is consumed than published competitors. This oscillator is applied in a 2.2GHz OOK transmitter and a 2.2GHz phase locked loop based FM receiver. With the increasing needs of compact antenna, possible high data rate and wide unused frequency range of short distance communication, a higher frequency phase locked loop used for BFSK receiver is explored using an LC oscillator for its capability at 20GHz. The success of frequency demodulation is demonstrated in the simulation results that the PLL can lock in 0.5μs with 35MHz lock-in range and 2MHz detection resolution. The model of a phase locked loop used for BFSK receiver is analyzed using Matlab

    Edge effects in silicon IGFETs.

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