347 research outputs found

    Microstrip broadband thin-film attenuators without via-hole-ground at millimeter wave frequencies

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    A comprehensive design methodology for microstrip broadband attenuators is presented. Closed-form design equations are given for two types of distributed attenuators. The attenuators are based on a cascade connection of thin-film resistors and microstrip line sections. The structure provides maximally flat attenuation and wideband performance without the need of plated via holes to ground, facilitating manufacture as well as achieving proper performance at millimeter wave frequencies. Experimental results demonstrate the validity of the technique applied to 3 dB and 13 dB broadband attenuators on aluminasubstrate up to 67 GHz. The proposed topology can be applied not only to MIC, but also to MMIC designs at the highest frequencies.This work was supported by the Spanish Ministry of Economy and Competitiveness mainly under Grant ESP2015-70646-C2-2-R and additionally under Grant TEC2017-83343-C4-1-R, and Ministry of Science, Innovation and Universities under Grant AYA2017-92153-EXP. The authors thank Eva Cuerno for her assistance during the attenuators assembly

    Enhancing Digital Controllability in Wideband RF Transceiver Front-Ends for FTTx Applications

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    Enhancing the digital controllability of wideband RF transceiver front-ends helps in widening the range of operating conditions and applications in which such systems can be employed. Technology limitations and design challenges often constrain the extensive adoption of digital controllability in RF front-ends. This work focuses on three major aspects associated with the design and implementation of a digitally controllable RF transceiver front-end for enhanced digital control. Firstly, the influence of the choice of semiconductor technology for a system-on-chip integration of digital gain control circuits are investigated. The digital control of gain is achieved by utilizing step attenuators that consist of cascaded switched attenuation stages. A design methodology is presented to evaluate the influence of the chosen technology on the performance of the three conventionally used switched attenuator topologies for desired attenuation levels, and the constraints that the technology suitable for high amplification places on the attenuator performance are examined. Secondly, a novel approach to the integrated implementation of gain slope equalization is presented, and the suitability of the proposed approach for integration within the RF front-end is verified. Thirdly, a sensitivity-aware implementation of a peak power detector is presented. The increased employment of digital gain control also increases the requirements on the sensitivity of the power detector employed for adaptive power and gain control. The design, implementation, and measurement results of a state-of-the-art wideband power detector with high sensitivity and large dynamic range are presented. The design is optimized to provide a large offset cancellation range, and the influence of offset cancellation circuits on the sensitivity of the power detector is studied. Moreover, design considerations for high sensitivity performance of the power detector are investigated, and the noise contributions from individual sub-circuits are evaluated. Finally, a wideband RF transceiver front-end is realized using a commercially available SiGe BiCMOS technology to demonstrate the enhancements in the digital controllability of the system. The RF front-end has a bandwidth of 500 MHz to 2.5 GHz, an input dynamic range of 20 dB, a digital gain control range larger than 30 dB, a digital gain slope equalization range from 1.49 dB/GHz to 3.78 dB/GHz, and employs a power detector with a sensitivity of -56 dBm and dynamic range of 64 dB. The digital control in the RF front-end is implemented using an on-chip serial-parallel-interface (SPI) that is controlled by an external micro-controller. A prototype implementation of the RF front-end system is presented as part of an RFIC intended for use in optical transceiver modules for fiber-to-the-x applications

    Millimeter-Wave Concurrent Dual-Band Sige Bicmos Rfic Phased-Array Transmitter and Components

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    A concurrent dual-band phased-array transmitter (TX) and its constituent components are studied in this dissertation. The TX and components are designed for the unlicensed bands, 22–29 and 57–64 GHz, using a 0.18-μm BiCMOS technology. Various studies have been done to design the components, which are suitable for the concurrent dual-band phased-array TX. The designed and developed components in this study are an attenuator, switch, phase shifter, power amplifier and power divider. Attenuators play a key role in tailoring main beam and side-lobe patterns in a phased-array TX. To perform the function in the concurrent dual-band phased-array TX, a 22–29 and 57–64 GHz concurrent dual-band attenuator with low phase variations is designed. Signal detection paths are employed at the output of the phased-array TX to monitor the phase and amplitude deviations/errors, which are larger in the high-frequency design. The detected information enables the TX to have an accurate beam tailoring and steering. A 10–67 GHz wide-band attenuator, covering the dual bands, is designed to manipulate the amplitude of the detected signal. New design techniques for an attenuator with a wide attenuation range and improved flatness are proposed. Also, a topology of dual-function circuit, attenuation and switching, is proposed. The switching turns on and off the detection path to minimize the leakages while the path is not used. Switches are used to minimize the number of components in the phased-array transceiver. With the switches, some of the bi-directional components in the transceiver such as an attenuator, phase shifter, filter, and antenna can be shared by the TX and receiver (RX) parts. In this dissertation, a high-isolation switch with a band-pass filtering response is proposed. The band-pass filtering response suppresses the undesired harmonics and intermodulation products of the TX. Phase shifters are used in phased-array TXs to steer the direction of the beam. A 24-GHz phase shifter with low insertion loss variation is designed using a transistor-body-floating technique for our phased-array TX. The low insertion loss variation minimizes the interference in the amplitude control operation (by attenuator or variable gain amplifier) in phased-array systems. BJTs in a BiCMOS process are characterized across dc to 67 GHz. A novel characterization technique, using on-wafer calibration and EM-based de-embedding both, is proposed and its accuracy at high frequencies is verified. The characterized BJT is used in designing the amplifiers in the phased-array TX. A concurrent dual-band power amplifier (PA) centered at 24 and 60 GHz is proposed and designed for the dual-band phased-array TX. Since the PA is operating in the dual frequency bands simultaneously, significant linearity issues occur. To resolve the problems, a study to find significant intermodulation (IM) products, which increase the third intermodulation (IM3) products most, has been done. Also, an advanced simulation and measurement methodology using three fundamental tones is proposed. An 8-way power divider with dual-band frequency response of 22–29 and 57–64 GHz is designed as a constituent component of the phased-array TX

    NEW APPROACHES TO WIDEBAND RF SWITCHING IN SILICON-GERMANIUM TECHNOLOGY

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    The objective of this research is to develop and investigate radio frequency (RF) switches utilizing silicon-germanium (SiGe) heterojunction bipolar transistors (HBTs) to provide a novel design approach for next-generation wideband circuits and systems. SiGe HBTs offer relatively small parasitic capacitance, making them suitable for wideband RF switching transistors with low insertion loss. Despite the available performance, the effective utilization of SiGe HBTs as RF series switches remains largely unexplored. The research presented in this dissertation introduces a novel RF series switch architecture, namely an anti-parallel (AP) SiGe HBT pair, as a potential wideband switching element for next-generation systems. The benefits of this novel RF series switch architecture are investigated, as well as insightful optimization techniques and an analysis of its operational principles. The dissertation then provides implemented design examples and develops design techniques leveraging properties possessed by the AP SiGe HBT pair.Ph.D

    A COMPREHENSIVE OVERVIEW OF RECENT DEVELOPMENTS IN RF-MEMS TECHNOLOGY-BASED HIGH-PERFORMANCE PASSIVE COMPONENTS FOR APPLICATIONS IN THE 5G AND FUTURE TELECOMMUNICATIONS SCENARIOS

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    The goal of this work is to provide an overview about the current development of radio-frequency microelectromechanical systems technology, with special attention towards those passive components bearing significant application potential in the currently developing 5G paradigm. Due to the required capabilities of such communication standard in terms of high data rates, extended allocated spectrum, use of massive MIMO (Multiple-Input-Multiple-Output) systems, beam steering and beam forming, the focus will be on devices like switches, phase shifters, attenuators, filters, and their packaging/integration. For each of the previous topics, several valuable contributions appeared in the last decade, underlining the improvements produced in the state of the art and the chance for RF-MEMS technology to play a prominent role in the actual implementation of the 5G infrastructure

    SOI RF-MEMS Based Variable Attenuator for Millimeter-Wave Applications

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    The most-attractive feature of microelectromechanical systems (MEMS) technology is that it enables the integration of a whole system on a single chip, leading to positive effects on the performance, reliability and cost. MEMS has made it possible to design IC-compatible radio frequency (RF) devices for wireless and satellite communication systems. Recently, with the advent of 5G, there is a huge market pull towards millimeter-wave devices. Variable attenuators are widely employed for adjusting signal levels in high frequency equipment. RF circuits such as automatic gain control amplifiers, broadband vector modulators, full duplex wireless systems, and radar systems are some of the primary applications of variable attenuators. This thesis describes the development of a millimeter-wave RF MEMS-based variable attenuator implemented by monolithically integrating Coplanar Waveguide (CPW) based hybrid couplers with lateral MEMS varactors on a Silicon–on–Insulator (SOI) substrate. The MEMS varactor features a Chevron type electrothermal actuator that controls the lateral movement of a thick plate, allowing precise change in the capacitive loading on a CPW line leading to a change in isolation between input and output. Electrothermal actuators have been employed in the design instead of electrostatic ones because they can generate relatively larger in-line deflection and force within a small footprint. They also provide the advantage of easy integration with other electrical micro-systems on the same chip, since their fabrication process is compatible with general IC fabrication processes. The development of an efficient and reliable actuator has played an important role in the performance of the proposed design of MEMS variable attenuator. A Thermoreflectance (TR) imaging system is used to acquire the surface temperature profiles of the electrothermal actuator employed in the design, so as to study the temperature distribution, displacement and failure analysis of the Chevron actuator. The 60 GHz variable attenuator was developed using a custom fabrication process on an SOI substrate with a device footprint of 3.8 mm x 3.1 mm. The fabrication process has a high yield due to the high-aspect-ratio single-crystal-silicon structures, which are free from warping, pre-deformation and sticking during the wet etching process. The SOI wafer used has a high resistivity (HR) silicon (Si) handle layer that provides an excellent substrate material for RF communication devices at microwave and millimeter wave frequencies. This low-cost fabrication process provides the flexibility to extend this module and implement more complex RF signal conditioning functions. It is thus an appealing candidate for realizing a wide range of reconfigurable RF devices. The measured RF performance of the 60 GHz variable attenuator shows that the device exhibits attenuation levels (|S21|) ranging from 10 dB to 25 dB over a bandwidth of 4 GHz and a return loss of better than 20 dB. The thesis also presents the design and implementation of a MEMS-based impedance tuner on a Silicon-On-Insulator (SOI) substrate. The tuner is comprised of four varactors monolithically integrated with CPW lines. Chevron actuators control the lateral motion of capacitive thick plates used as contactless lateral MEMS varactors, achieving a capacitance range of 0.19 pF to 0.8 pF. The improvement of the Smith chart coverage is achieved by proper choice of the electrical lengths of the CPW lines and precise control of the lateral motion of the capacitive plates. The measured results demonstrate good impedance matching coverage, with an insertion loss of 2.9 dB. The devices presented in this thesis provide repeatable and reliable operation due to their robust, thick-silicon structures. Therefore, they exhibit relatively low residual stress and are free from stiction and micro-welding problems

    Program on application of communications satellites to educational development: Design of a 12 channel FM microwave receiver

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    The design, fabrication, and performance of elements of a low cost FM microwave satellite ground station receiver is described. It is capable of accepting 12 contiguous color television equivalent bandwidth channels in the 11.72 to 12.2 GHz band. Each channel is 40 MHz wide and incorporates a 4 MHz guard band. The modulation format is wideband FM and the channels are frequency division multiplexed. Twelve independent CATV compatible baseband outputs are provided. The overall system specifications are first discussed, then consideration is given to the receiver subsystems and the signal branching network

    Design of a 12 channel fm microwave receiver

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    The design, fabrication, and performance of elements of a low cost FM microwave satellite ground station receiver is described. It is capable of accepting 12 contiguous color television equivalent bandwidth channels in the 11.72 to 12.2 GHz band. Each channel is 40 MHz wide and incorporates a 4 MHz guard band. The modulation format is wideband FM and the channels are frequency division multiplexed. Twelve independent CATV compatible baseband outputs are provided. The overall system specifications are first discussed, then consideration is given to the receiver subsystems and the signal branching network

    Bidirectional common-path for 8-to-24 gHz low noise SiGe BiCMOS T/R module core-chip

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    This thesis is based on the design of an 8-to-24 GHz low noise SiGe BiCMOS Transmitter/Receiver (T/R) Module core-chip in a small area by bidirectional common-path. The next-generation phased array systems require multi-functionality and multi-band operation to form multi-purpose integrated circuits. Wide bandwidth becomes a requirement for the system in various applications, such as electronic warfare, due to leading cheaper and lighter system solutions. Although III-V technologies can satisfy the high-frequency specifications, they are expensive and have a large area. The silicon-based technologies promise high integration capability with low cost, but they sacrifice from the performance to result in desired bandwidth. The presented dissertation targets system and circuit level solutions on the described content. The wideband core-chip utilized a bidirectional common path to surpass the bandwidth limitations. The bidirectionality enhances the bandwidth, noise, gain and area of the transceiver by the removal of the repetitive blocks in the unidirectional common chain. This approach allows succeeding desired bandwidth and compactness without sacrificing from the other high-frequency parameters. The realized core-chip has 31.5 and 32 dB midband gain for the receiver and transmitter respectively, with a + 2.1 dB /GHz of positive slope. Its RMS phase and amplitude errors are lower than 5.60 and 0.8 dB, respectively for 4-bit of resolution. The receiver noise figure is lower than 5 dB for the defined bandwidth while dissipating 112 mW of power in a 5.5 mm2 area. The presented results verify the advantage of the favored architecture and might replace the III-V based counterparts
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