A Low-Power, Reconfigurable, Pipelined ADC with Automatic Adaptation for Implantable Bioimpedance Applications

Biomedical monitoring systems that observe various physiological parameters or electrochemical reactions typically cannot expect signals with fixed amplitude or frequency as signal properties can vary greatly even among similar biosignals. Furthermore, advancements in biomedical research have resulted in more elaborate biosignal monitoring schemes which allow the continuous acquisition of important patient information. Conventional ADCs with a fixed resolution and sampling rate are not able to adapt to signals with a wide range of variation. As a result, reconfigurable analog-to-digital converters (ADC) have become increasingly more attractive for implantable biosensor systems. These converters are able to change their operable resolution, sampling rate, or both in order convert changing signals with increased power efficiency. Traditionally, biomedical sensing applications were limited to low frequencies. Therefore, much of the research on ADCs for biomedical applications focused on minimizing power consumption with smaller bias currents resulting in low sampling rates. However, recently bioimpedance monitoring has become more popular because of its healthcare possibilities. Bioimpedance monitoring involves injecting an AC current into a biosample and measuring the corresponding voltage drop. The frequency of the injected current greatly affects the amplitude and phase of the voltage drop as biological tissue is comprised of resistive and capacitive elements. For this reason, a full spectrum of measurements from 100 Hz to 10-100 MHz is required to gain a full understanding of the impedance. For this type of implantable biomedical application, the typical low power, low sampling rate analog-to-digital converter is insufficient. A different optimization of power and performance must be achieved. Since SAR ADC power consumption scales heavily with sampling rate, the converters that sample fast enough to be attractive for bioimpedance monitoring do not have a figure-of-merit that is comparable to the slower converters. Therefore, an auto-adapting, reconfigurable pipelined analog-to-digital converter is proposed. The converter can operate with either 8 or 10 bits of resolution and with a sampling rate of 0.1 or 20 MS/s. Additionally, the resolution and sampling rate are automatically determined by the converter itself based on the input signal. This way, power efficiency is increased for input signals of varying frequency and amplitude

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Department of Electrical EngineeringA Sensor system is advanced along sensor technologies are developed. The performance improvement of sensor system can be expected by using the internet of things (IoT) communication technology and artificial neural network (ANN) for data processing and computation. Sensors or systems exchanged the data through this wireless connectivity, and various systems and applications are possible to implement by utilizing the advanced technologies. And the collected data is computed using by the ANN and the efficiency of system can be also improved. Gas monitoring system is widely need from the daily life to hazardous workplace. Harmful gas can cause a respiratory disease and some gas include cancer-causing component. Even though it may cause dangerous situation due to explosion. There are various kinds of hazardous gas and its characteristics that effect on human body are different each gas. The optimal design of gas monitoring system is necessary due to each gas has different criteria such as the permissible concentration and exposure time. Therefore, in this thesis, conventional sensor system configuration, operation, and limitation are described and gas monitoring system with wireless connectivity and neural network is proposed to improve the overall efficiency. As I already mentioned above, dangerous concentration and permissible exposure time are different depending on gas types. During the gas monitoring, gas concentration is lower than a permissible level in most of case. Thus, the gas monitoring is enough with low resolution for saving the power consumption in this situation. When detecting the gas, the high-resolution is required for the accurate concentration detecting. If the gas type is varied in the above situation, the amount of calculation increases exponentially. Therefore, in the conventional systems, target specifications are decided by the highest requirement in the whole situation, and it occurs increasing the cost and complexity of readout integrated circuit (ROIC) and system. In order to optimize the specification, the ANN and adaptive ROIC are utilized to compute the complex situation and huge data processing. Thus, gas monitoring system with learning-based algorithm is proposed to improve its efficiency. In order to optimize the operation depending on situation, dual-mode ROIC that monitoring mode and precision mode is implemented. If the present gas concentration is decided to safe, monitoring mode is operated with minimal detecting accuracy for saving the power consumption. The precision mode is switched when the high-resolution or hazardous situation are detected. The additional calibration circuits are necessary for the high-resolution implementation, and it has more power consumption and design complexity. A high-resolution Analog-to-digital converter (ADC) is kind of challenges to design with efficiency way. Therefore, in order to reduce the effective resolution of ADC and power consumption, zooming correlated double sampling (CDS) circuit and prediction successive approximation register (SAR) ADC are proposed for performance optimization into precision mode. A Microelectromechanical systems (MEMS) based gas sensor has high-integration and high sensitivity, but the calibration is needed to improve its low selectivity. Conventionally, principle component analysis (PCA) is used to classify the gas types, but this method has lower accuracy in some case and hard to verify in real-time. Alternatively, ANN is powerful algorithm to accurate sensing through collecting the data and training procedure and it can be verified the gas type and concentration in real-time. ROIC was fabricated in complementary metal-oxide-semiconductor (CMOS) 180-nm process and then the efficiency of the system with adaptive ROIC and ANN algorithm was experimentally verified into gas monitoring system prototype. Also, Bluetooth supports wireless connectivity to PC and mobile and pattern recognition and prediction code for SAR ADC is performed in MATLAB. Real-time gas information is monitored by Android-based application in smartphone. The dual-mode operation, optimization of performance and prediction code are adjusted with microcontroller unit (MCU). Monitoring mode is improved by x2.6 of figure-of-merits (FoM) that compared with previous resistive interface.clos

An Energy-Autonomous Smart Shirt employing wearable sensors for Users’ Safety and Protection in Hazardous Workplaces

none4siWearable devices represent a versatile technology in the IoT paradigm, enabling noninvasive and accurate data collection directly from the human body. This paper describes the development of a smart shirt to monitor working conditions in particularly dangerous workplaces. The wearable device integrates a wide set of sensors to locally acquire the user’s vital signs (e.g., heart rate, blood oxygenation, and temperature) and environmental parameters (e.g., the concentration of dangerous gas species and oxygen level). Electrochemical gas-monitoring modules were designed and integrated into the garment for acquiring the concentrations of CO, O2, CH2O, and H2S. The acquired data are wirelessly sent to a cloud platform (IBM Cloud), where they are displayed, processed, and stored. A mobile application was deployed to gather data from the wearable devices and forward them toward the cloud application, enabling the system to operate in areas where aWiFi hotspot is not available. Additionally, the smart shirt comprises a multisource harvesting section to scavenge energy from light, body heat, and limb movements. Indeed, the wearable device integrates several harvesters (thin-film solar panels, thermoelectric generators (TEGs), and piezoelectric transducers), a low-power conditioning section, and a 380 mAh LiPo battery to accumulate the recovered charge. Field tests indicated that the harvesting section could provide up to 216 mW mean power, fully covering the power requirements (P = 1.86 mW) of the sensing, processing, and communication sections in all considered conditions (3.54 mW in the worst-case scenario). However, the 380 mAh LiPo battery guarantees about a 16-day lifetime in the complete absence of energy contributions from the harvesting section.Special Issue “Innovative Materials, Smart Sensors and IoT-based Electronic Solutions for Wearable Applications”, https://www.mdpi.com/journal/applsci/special_issues/Materials_Sensors_Electronic_Solutions_Wearable_ApplicationsopenRoberto De Fazio, Abdel-Razzak Al-Hinnawi, Massimo De Vittorio, Paolo ViscontiDE FAZIO, Roberto; Al-Hinnawi, Abdel-Razzak; DE VITTORIO, Massimo; Visconti, Paol

CMOS Data Converters for Closed-Loop mmWave Transmitters

With the increased amount of data consumed in mobile communication systems, new solutions for the infrastructure are needed. Massive multiple input multiple output (MIMO) is seen as a key enabler for providing this increased capacity. With the use of a large number of transmitters, the cost of each transmitter must be low. Closed-loop transmitters, featuring high-speed data converters is a promising option for achieving this reduced unit cost.In this thesis, both digital-to-analog (D/A) and analog-to-digital (A/D) converters suitable for wideband operation in millimeter wave (mmWave) massive MIMO transmitters are demonstrated. A 2 76 bit radio frequency digital-to-analog converter (RF-DAC)-based in-phase quadrature (IQ) modulator is demonstrated as a compact building block, that to a large extent realizes the transmit path in a closed-loop mmWave transmitter. The evaluation of an successive-approximation register (SAR) analog-to-digital converter (ADC) is also presented in this thesis. Methods for connecting simulated and measured performance has been studied in order to achieve a better understanding about the alternating comparator topology.These contributions show great potential for enabling closed-loop mmWave transmitters for massive MIMO transmitter realizations

Multi-stage noise shaping (MASH) delta-sigma modulators for wideband and multi-standard applications

Imperial Users onl

Ultra-low power mixed-signal frontend for wearable EEGs

Electronics circuits are ubiquitous in daily life, aided by advancements in the chip design industry, leading to miniaturised solutions for typical day to day problems. One of the critical healthcare areas helped by this advancement in technology is electroencephalography (EEG). EEG is a non-invasive method of tracking a person's brain waves, and a crucial tool in several healthcare contexts, including epilepsy and sleep disorders. Current ambulatory EEG systems still suffer from limitations that affect their usability. Furthermore, many patients admitted to emergency departments (ED) for a neurological disorder like altered mental status or seizures, would remain undiagnosed hours to days after admission, which leads to an elevated rate of death compared to other conditions. Conducting a thorough EEG monitoring in early-stage could prevent further damage to the brain and avoid high mortality. But lack of portability and ease of access results in a long wait time for the prescribed patients. All real signals are analogue in nature, including brainwaves sensed by EEG systems. For converting the EEG signal into digital for further processing, a truly wearable EEG has to have an analogue mixed-signal front-end (AFE). This research aims to define the specifications for building a custom AFE for the EEG recording and use that to review the suitability of the architectures available in the literature. Another critical task is to provide new architectures that can meet the developed specifications for EEG monitoring and can be used in epilepsy diagnosis, sleep monitoring, drowsiness detection and depression study. The thesis starts with a preview on EEG technology and available methods of brainwaves recording. It further expands to design requirements for the AFE, with a discussion about critical issues that need resolving. Three new continuous-time capacitive feedback chopped amplifier designs are proposed. A novel calibration loop for setting the accurate value for a pseudo-resistor, which is a crucial block in the proposed topology, is also discussed. This pseudoresistor calibration loop achieved the resistor variation of under 8.25%. The thesis also presents a new design of a curvature corrected bandgap, as well as a novel DDA based fourth-order Sallen-Key filter. A modified sensor frontend architecture is then proposed, along with a detailed analysis of its implementation. Measurement results of the AFE are finally presented. The AFE consumed a total power of 3.2A (including ADC, amplifier, filter, and current generation circuitry) with the overall integrated input-referred noise of 0.87V-rms in the frequency band of 0.5-50Hz. Measurement results confirmed that only the proposed AFE achieved all defined specifications for the wearable EEG system with the smallest power consumption than state-of-art architectures that meet few but not all specifications. The AFE also achieved a CMRR of 131.62dB, which is higher than any studied architectures.Open Acces

High-Accuracy Digital to Analog Converter Dedicated to Sine-Waveform Generator for Avionic Applications

RÉSUMÉ De nos jours, malgré les avancées remarquables de la microélectronique, les systèmes avioniques emploient essentiellement des technologies vieillissantes afin de répondre aux normes de sécurité exigeantes des systèmes avioniques. La nouvelle génération d'avionique modulaire intégrée (AMI) des More Electric Aircrafts (MEA), nécessite des architectures de réseaux stables et fiables, employant des modules électroniques intégrables modernes qui restent à être conçus et développés. Suivant cette tendance, une interface générique intelligente pour capteurs (Smart Sensor Interface - SSI), dédiée aux capteurs de position avionique est proposée dans ce mémoire. Le circuit intégré SSI fera partie d'un réseau de capteurs AFDX amélioré et est composé de signaux d'excitation et de modules d'acquisition de données. Les efforts de conception sont concentrés sur l'unité de génération de signaux d'excitation (Excitation Signal Generation - ESG) de la SSI. En tant que lien entre le réseau AFDX et les capteurs de déplacement, l'unité ESG doit générer des signaux sinusoïdaux précis, d'une fréquence allant de 1.5 kHz à 10 kHz. En respectant la programmation de l'interface, nous démontrerons qu'une architecture de générateur de signaux basée sur la mémoire est la seule option qui réponde aux objectifs du design. Le design d'un convertisseur numérique-analogique (CNA) basé sur le principe du sur-échantillonnage et faisant partie du chemin ESG est également présenté dans ce travail. Ce CNA est le noyau d'un générateur de signaux sinusoïdaux versatile conçu pour le système SSI proposé. Un taux d'échantillonnage élevé est utilisé dans ce CNA, de façon à obtenir un rapport signal sur bruit (Signal to Noise Ratio - SNR) élevé. Une analyse de l'impact d'une implémentation carrée et non-carrée de la matrice de sources de courant (Current Source Array - CSA) sur la performance de la séquence de commutation est présentée. Il sera démontré que la considération de tels impacts conduit à la conception de CNA plus précis. Une séquence de commutation optimale pour la taille du CSA conçu, sera introduite. Afin de réduire la taille des plots d'entrées et de sorties de la puce, un convertisseur de données série à parallèle haute-vitesse est inclu dans le CNA. Ainsi, les données d'entrée peuvent être envoyées de façon sérielle à un registre à décalage et appliquées de façon interne au noyau du CNA.----------ABSTRACT Today, despite the astonishing advances in the field of Microelectronics, avionics systems are mostly employing older technologies to guarantee the level of reliability required by stringent safety standards of avionic systems. Toward the new generation of Integrated Modular Avionics (IMA) in More Electric Aircrafts (MEA), reliable and stable network architecture which employs modern integrated electronic modules must be designed and developed. In this trend, a generic Smart Sensor Interface (SSI) for avionics displacement sensors will be proposed in this Master thesis. The integrated SSI circuit will be part of an improved AFDX sensor network and consists of signal excitation and data acquisition paths. The design efforts of this Master thesis will focus on the Excitation Signal Generation (ESG) unit of the SSI. As a link between AFDX network and displacement sensors, the ESG unit should generate pure and accurate sine-waveform with variable frequency between 1.5 kHz and 10 kHz. Respecting the programmability of the interface, it will be shown that a memory-based signal generator architecture is the only choice which supports the design objectives. As part of the ESG path, the detailed design of a 10-bit interpolating digital to analog converter (DAC) will also be presented in this work. The DAC is the core of a versatile sine-waveform generator unit designed for avionics SSI. High-speed sample rate will be used in this segmented current steering DAC in order to achieve a high Signal to Noise Ratio (SNR). In the module level design of the DAC, the impact of square and non-square implementation of the current source array (CSA) on the performance of the switching sequence is introduced. It will be shown that considering such impacts will lead to the design of more accurate DACs. An optimum switching sequence for the designed CSA size will be designed and introduced. In order to reduce the I/O pads of the chip, high-speed serial to parallel converter will be included in the DAC. Thus the input data can be serially sent to the input shift register and internally applied to the DAC core. The DAC was fabricated on 1.2 × 1.2 mm2 chip fabricated using IBM 0.13µm CMOS technology, operating with a supply voltage of 1.2 V. Sourcing a sine wave current with a peak of 1023 µA, the proposed DAC is able to achieve a SNR better than 84 dB in the Nyquist bandwidth of DC to 20 kHz

Energy-Efficient In-Memory Architectures Leveraging Intrinsic Behaviors of Embedded MRAM Devices

For decades, innovations to surmount the processor versus memory gap and move beyond conventional von Neumann architectures continue to be sought and explored. Recent machine learning models still expend orders of magnitude more time and energy to access data in memory in addition to merely performing the computation itself. This phenomenon referred to as a memory-wall bottleneck, is addressed herein via a completely fresh perspective on logic and memory technology design. The specific solutions developed in this dissertation focus on utilizing intrinsic switching behaviors of embedded MRAM devices to design cross-layer and energy-efficient Compute-in-Memory (CiM) architectures, accelerate the computationally-intensive operations in various Artificial Neural Networks (ANNs), achieve higher density and reduce the power consumption as crucial requirements in future Internet of Things (IoT) devices. The first cross-layer platform developed herein is an Approximate Generative Adversarial Network (ApGAN) designed to accelerate the Generative Adversarial Networks from both algorithm and hardware implementation perspectives. In addition to binarizing the weights, further reduction in storage and computation resources is achieved by leveraging an in-memory addition scheme. Moreover, a memristor-based CiM accelerator for ApGAN is developed. The second design is a biologically-inspired memory architecture. The Short-Term Memory and Long-Term Memory features in biology are realized in hardware via a beyond-CMOS-based learning approach derived from the repeated input information and retrieval of the encoded data. The third cross-layer architecture is a programmable energy-efficient hardware implementation for Recurrent Neural Network with ultra-low power, area-efficient spin-based activation functions. A novel CiM architecture is proposed to leverage data-level parallelism during the evaluation phase. Specifically, we employ an MRAM-based Adjustable Probabilistic Activation Function (APAF) via a low-power tunable activation mechanism, providing adjustable accuracy levels to mimic ideal sigmoid and tanh thresholding along with a matching algorithm to regulate neuronal properties. Finally, the APAF design is utilized in the Long Short-Term Memory (LSTM) network to evaluate the network performance using binary and non-binary activation functions. The simulation results indicate up to 74.5 x 215; energy-efficiency, 35-fold speedup and ~11x area reduction compared with the similar baseline designs. These can form basis for future post-CMOS based non-Von Neumann architectures suitable for intermittently powered energy harvesting devices capable of pushing intelligence towards the edge of computing network