Ring oscillator clocks and margins

How much margin do we have to add to the delay lines of a bundled-data circuit? This paper is an attempt to give a methodical answer to this question, taking into account all sources of variability and the existing EDA machinery for timing analysis and sign-off. The paper is based on the study of the margins of a ring oscillator that substitutes a PLL as clock generator. A timing model is proposed that shows that a 12% margin for delay lines can be sufficient to cover variability in a 65nm technology. In a typical scenario, performance and energy improvements between 15% and 35% can be obtained by using a ring oscillator instead of a PLL. The paper concludes that a synchronous circuit with a ring oscillator clock shows similar benefits in performance and energy as those of bundled-data asynchronous circuits.Peer ReviewedPostprint (author's final draft

An absolute calibration system for millimeter-accuracy APOLLO measurements

Lunar laser ranging provides a number of leading experimental tests of gravitation -- important in our quest to unify General Relativity and the Standard Model of physics. The Apache Point Observatory Lunar Laser-ranging Operation (APOLLO) has for years achieved median range precision at the ~2 mm level. Yet residuals in model-measurement comparisons are an order-of-magnitude larger, raising the question of whether the ranging data are not nearly as accurate as they are precise, or if the models are incomplete or ill-conditioned. This paper describes a new absolute calibration system (ACS) intended both as a tool for exposing and eliminating sources of systematic error, and also as a means to directly calibrate ranging data in-situ. The system consists of a high-repetition-rate (80 MHz) laser emitting short (< 10 ps) pulses that are locked to a cesium clock. In essence, the ACS delivers photons to the APOLLO detector at exquisitely well-defined time intervals as a "truth" input against which APOLLO's timing performance may be judged and corrected. Preliminary analysis indicates no inaccuracies in APOLLO data beyond the ~3 mm level, suggesting that historical APOLLO data are of high quality and motivating continued work on model capabilities. The ACS provides the means to deliver APOLLO data both accurate and precise below the 2 mm level.Comment: 21 pages, 10 figures, submitted to Classical and Quantum Gravit

Full phase stabilization of a Yb:fiber femtosecond frequency comb via high-bandwidth transducers

We present full phase stabilization of an amplified Yb:fiber femtosecond frequency comb using an intra-cavity electro-optic modulator and an acousto-optic modulator. These transducers provide high servo bandwidths of 580 kHz and 250 kHz for frep and fceo, producing a robust and low phase noise fiber frequency comb. The comb was self-referenced with an f - 2f interferometer and phase locked to an ultra-stable optical reference used for the JILA Sr optical clock at 698 nm, exhibiting 0.21 rad and 0.47 rad of integrated phase errors (over 1 mHz - 1 MHz) respectively. Alternatively, the comb was locked to two optical references at 698 nm and 1064 nm, obtaining 0.43 rad and 0.14 rad of integrated phase errors respectively

Increasing the robustness of digital circuits with ring oscillator clocks

Technology scaling enables lower supply voltages, but also increases power density of integrated circuits. In this context, power integrity becomes a major concern in the implementation of highperformance designs. This paper analyzes the influence of Ring Oscillator Clocks (ROCs) on mitigating the impacts of voltage noise. A design with an ROC as the clock source is able to work correctly even in the presence of severe and unpredictable voltage emergencies, without degrading the average performance and power metrics of the circuit. ROCs offer an instantaneous and continuous adaptation to the environment conditions, thus reducing the margins used to prevent timing failures. ROCs provide robustness independently of the power delivery network, thus relaxing the constraints required for the design of the PCB and package. As a by-product, the inherent jitter generated by ROCs produces a spreadspectrum effect that reduces electromagnetic emissions.Peer ReviewedPostprint (published version

A Software-based Low-Jitter Servo Clock for Inexpensive Phasor Measurement Units

This paper presents the design and the implementation of a servo-clock (SC) for low-cost Phasor Measurement Units (PMUs). The SC relies on a classic Proportional Integral (PI) controller, which has been properly tuned to minimize the synchronization error due to the local oscillator triggering the on-board timer. The SC has been implemented into a PMU prototype developed within the OpenPMU project using a BeagleBone Black (BBB) board. The distinctive feature of the proposed solution is its ability to track an input Pulse-Per-Second (PPS) reference with good long-term stability and with no need for specific on-board synchronization circuitry. Indeed, the SC implementation relies only on one co-processor for real-time application and requires just an input PPS signal that could be distributed from a single substation clock