313 research outputs found
Memristors for the Curious Outsiders
We present both an overview and a perspective of recent experimental advances
and proposed new approaches to performing computation using memristors. A
memristor is a 2-terminal passive component with a dynamic resistance depending
on an internal parameter. We provide an brief historical introduction, as well
as an overview over the physical mechanism that lead to memristive behavior.
This review is meant to guide nonpractitioners in the field of memristive
circuits and their connection to machine learning and neural computation.Comment: Perpective paper for MDPI Technologies; 43 page
Memristor-based Synaptic Networks and Logical Operations Using In-Situ Computing
We present new computational building blocks based on memristive devices.
These blocks, can be used to implement either supervised or unsupervised
learning modules. This is achieved using a crosspoint architecture which is an
efficient array implementation for nanoscale two-terminal memristive devices.
Based on these blocks and an experimentally verified SPICE macromodel for the
memristor, we demonstrate that firstly, the Spike-Timing-Dependent Plasticity
(STDP) can be implemented by a single memristor device and secondly, a
memristor-based competitive Hebbian learning through STDP using a synaptic network. This is achieved by adjusting the memristor's
conductance values (weights) as a function of the timing difference between
presynaptic and postsynaptic spikes. These implementations have a number of
shortcomings due to the memristor's characteristics such as memory decay,
highly nonlinear switching behaviour as a function of applied voltage/current,
and functional uniformity. These shortcomings can be addressed by utilising a
mixed gates that can be used in conjunction with the analogue behaviour for
biomimetic computation. The digital implementations in this paper use in-situ
computational capability of the memristor.Comment: 18 pages, 7 figures, 2 table
Computers from plants we never made. Speculations
We discuss possible designs and prototypes of computing systems that could be
based on morphological development of roots, interaction of roots, and analog
electrical computation with plants, and plant-derived electronic components. In
morphological plant processors data are represented by initial configuration of
roots and configurations of sources of attractants and repellents; results of
computation are represented by topology of the roots' network. Computation is
implemented by the roots following gradients of attractants and repellents, as
well as interacting with each other. Problems solvable by plant roots, in
principle, include shortest-path, minimum spanning tree, Voronoi diagram,
-shapes, convex subdivision of concave polygons. Electrical properties
of plants can be modified by loading the plants with functional nanoparticles
or coating parts of plants of conductive polymers. Thus, we are in position to
make living variable resistors, capacitors, operational amplifiers,
multipliers, potentiometers and fixed-function generators. The electrically
modified plants can implement summation, integration with respect to time,
inversion, multiplication, exponentiation, logarithm, division. Mathematical
and engineering problems to be solved can be represented in plant root networks
of resistive or reaction elements. Developments in plant-based computing
architectures will trigger emergence of a unique community of biologists,
electronic engineering and computer scientists working together to produce
living electronic devices which future green computers will be made of.Comment: The chapter will be published in "Inspired by Nature. Computing
inspired by physics, chemistry and biology. Essays presented to Julian Miller
on the occasion of his 60th birthday", Editors: Susan Stepney and Andrew
Adamatzky (Springer, 2017
Real-time Analog Pixel-to-pixel Dynamic Frame Differencing with Memristive Sensing Circuits
In this paper, we propose an analog pixel differencing circuit for
differentiating pixels between frames directly from CMOS pixels. The analog
information processing at sensor is a topic of growing appeal to develop edge
AI devices. The proposed circuit is integrated into a pixel-parallel and
pixel-column architectures. The proposed system is design using TSMC
CMOS technology. The power dissipation of the proposed circuit is ,
and on-chip ares is . The architectures are tested for moving
object detection application.Comment: IEEE SENSORS 201
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