Commercial Off-The-Shelf (COTS) Parts Risk and Reliability User and Application Guide

All COTS parts are not created equal. Because they are not created equal, the notion that one can force the commercial industry to follow a set of military specifications and standards, along with the certifications, audits and qualification commitments that go with them, is unrealistic for the sale of a few parts. The part technologies that are Defense Logistics Agency (DLA) certified or Military Specification (MS) qualified, are several generations behind the state-of-the-art high-performance parts that are required for the compact, higher performing systems for the next generation of spacecraft and instruments. The majority of the part suppliers are focused on the portion of the market that is producing high-tech commercial products and systems. To that end, in order to compete in the high performance and leading edge advanced technological systems, an alternative approach to risk assessment and reliability prediction must be considered

REMAINING LIFE ASSESSMENT PROCESS OF ELECTRONIC SYSTEMS

The remaining life assessment (RLA) process is a reliability prediction process, which predicts amount of life left in a system. Remaining life assessment is performed on hardware, which has already seen operational life. This thesis details the remaining life assessment process in detail and also provides a case study of remaining life assessment performed on the Shuttle Remote Manipulator System (SRMS). The electronics of Shuttle Remote Manipulator System was designed in the 1970s with a target application life of ten years. They have performed without any failures for over 20 years. The remaining life assessment process was done to investigate if the life of the SRMS could be extended until the year 2020. The remaining life assessment concluded that the electronics could be extended until 2020 due to the robust design and lack of damage caused to the assemblies

Conceptual design and feasibility evaluation model of a 10 to the 8th power bit oligatomic mass memory. Volume 1: Conceptual design

The oligatomic (mirror) thin film memory technology is a suitable candidate for general purpose spaceborne applications in the post-1975 time frame. Capacities of around 10 to the 8th power bits can be reliably implemented with systems designed around a 335 million bit module. The recommended mode was determined following an investigation of implementation sizes ranging from an 8,000,000 to 100,000,000 bits per module. Cost, power, weight, volume, reliability, maintainability and speed were investigated. The memory includes random access, NDRO, SEC-DED, nonvolatility, and dual interface characteristics. The applications most suitable for the technology are those involving a large capacity with high speed (no latency), nonvolatility, and random accessing

Process techniques study of integrated circuits Final scientific report

Surface impurity and structural defect analysis on thermally grown silicon oxide integrated circui

Design and reliability of polymeric packages for high voltage power semiconductors

This thesis focuses on the development of a novel polymer based housing for power thyristor devices typically used in long distance high voltage direct current (HVDC) transmission. Power thyristor devices used in HVDC power conversion stations are typically packaged in a hermetically sealed ceramic housing and have demonstrated an excellent history of reliability and performance. However, to avoid increasing the number of thyristors in future higher powered HVDC schemes thyristors having higher power ratings at 8.5 kV and sizes at 125 mm and 150 mm diameters are sought for implementation to achieve higher transmission ratings of, for example, 4000 A at +/- 800 kV. The main disadvantages of such large ceramic-based packages are higher processing cost and weight whilst robustness is also a concern. To overcome these issues, replacing the current ceramic housing with a polymeric material has been investigated in this project. The advantages it is anticipated such packages will provide include lower cost, less weight, robustness, recyclability, etc. However, some challenges it will also offer are: non-hermeticity i.e. polymers are moisture and gas permeable, potentially more complex manufacturing routes, and different electrical, mechanical and thermal properties compared to ceramic materials. The work presented in this thesis was part of a larger project where these challenges have been addressed by developing and testing a prototype polymeric thyristor housing. The prototype is aimed at demonstrating that polymer packages can deliver performance and reliability comparable to, if not better than, current ceramic packages. In this thesis, it is the package development and reliability related studies that are discussed. Because the housings will experience severe electrical stresses and various thermal excursions during their service life, the electrical and thermo-mechanical behaviour of the polymer housing was studied using finite element analysis to gain an understanding of the effects of various design variables and materials properties on performance and the tradeoffs between performance and manufacturability. From these modelling studies, design guidelines have been established for the future development of polymer housings. On the other hand, to identify the physics-of-failure of the prototype that was manufactured as part of the project, accelerated life tests were performed to study its reliability. The knowledge gained from the polymer prototype development was then applied to the design of a larger 125 mm diameter housing using the Taguchi method of experimental design

Reliability evaluation of stacked die BGA assemblies under mechanical bending loads

This thesis presents a reliability evaluation of stacked die ball grid array (BGA) assemblies under mechanical bending loads. The test specimens used in this investigation were four die stacked BGAs assembled on printed circuit boards (PCBs) with eutectic tin-lead solder and gold over nickel finishes, both as-reflowed and after aging. The failure envelopes of both types of specimen were quantified in terms of PCB flexural strain and strain rate. The experimental data from cyclic bending tests at three strain amplitudes with a constant strain rate have been used to determine the effect of strain amplitudes on cycles to failure. The experimental data from cyclic bending tests were combined with the data from impact tests to determine the effect of strain rate to cycles to failure. The failure sites associated with each test condition were identified, and failure site transition phenomena are reported and discussed

Study Of Deformation And Crack Propagation On Component During Reflow Soldering Process

A typical element found in electronic assemblies and devices is the multi-layered ceramic capacitor (MLCC). However, MLCC mechanical defects such as voiding, cracking, and delamination would significantly reduce the device's usefulness, dependability, and longevity. This mechanical defect is one of the significant factors that will develop in the surface mount of the multi-layered ceramic capacitor, especially the layer between the two different materials that are mounted together. Therefore, the purpose of this study is to study the crack propagation that will be found in the boundary of the copper and copper-epoxy layers of the multi-layered ceramic capacitor during the reflow soldering process. The numerical simulation method for the thermal reflow process of the MLCC model and the crack propagation from the initial micro voids due to the high moisture contamination on that layer was approached. Besides, the temperature flow and the moisture contamination on the copper and copper-epoxy layers were examined during the simulation for the causes of the crack propagation on the MLCC. From the results of the simulation conducted, the crack propagation in between the copper and copper-epoxy layers was caused by the thermal mismatch and propagation growth of micro voids during the reflow soldering process. As a result of the high pressure of vapour absorbed in the gap between the copper and copper-epoxy layer, it will have a greater capacity to absorb moisture and cause crack delamination, resulting in the higher temperatures required to commence the crack at 270 °C during the reflow process. At 284.2 (mg/mm3), the concentration is at its highest. Because of this, a multi-layered ceramic capacitor results in a 0.077218 mm deformation between copper and copper-epoxy. Higher vicinity stress, mode I stress intensity factor, and crack elongation rate would result from this greater void. The main reason for the temperature reflows that is related to the fracture propagation problems in capacitors has been identified, and workable solutions have thus been suggested. This would help the end-users by enhancing the performance and dependability of the electronic equipment, as well as minimizing the additional manufacturing costs and lead times required in locating and resolving the problems