Avaliação da qualidade de experiência de vídeo em várias tecnologias

Mestrado em Engenharia Eletrónica e TelecomunicaçõesNowadays the internet is associated with many services. Combined with this fact, there is a marked increase of the users joining this service. In this perspective, it is required that the service providers guarantee a minimum quality to the network services. The Quality of Experience of services is quite crucial in the development of services in networks. Also noteworthy, the tra c increase in multimedia services, including video streaming, increases the probability of congesting the networks. In the perspective of the service provider, the monitoring is a solution to avoid saturation in network. This way, this dissertation proposes to develop a platform that allows a multimedia tra c monitoring in the Meo Go service provided by the operator Portugal Telecom Communications. The architecture of the adaptive streaming over HTTP has been studied and tested to obtain the quality of experience metrics. This adaptive streaming technique presents the smooth streaming, an architecture made by Microsoft company, and it is used in the Meo Go service. Then, it is monitored the metrics obtained with the video player. This analysis is done objectively and subjectively. In this phase, the objective implementation of the method allows to obtain the prediction value of the Quality of Experience by consumers. The selected metrics were derived from the state / performance of network and terminal device. The obtained metrics aim to simulate human action in video score quality. Otherwise, subjectively, it is conducted a survey based in a questionnaire to compare methods. In this phase it was created an on-line platform to allow the obtain a greater number of rankings and data processing. In the obtained results, rstly in the smooth streaming player, it is shown the adaptive streaming implementation technique. On the next phase, test scenarios were created to demonstrate the functioning of the method in many cases, with greater relevance for those ones with higher dynamic complexity. From the perspective of subjective and objective methods, these have values that con rm the architecture of the implemented module. Over time, the performance of the scoring the quality of video streaming services approaches the one in a human mental action.Nos dias de hoje a Internet é um dos meios com mais serviços associados. Conjugado a este facto, existe um acentuado aumento de utilizadores a aderir a este serviço. Nesta perspectiva existe a necessidade de garantir uma qualidade mínima por parte dos prestadores de serviços. A Qualidade de Experiência que os consumidores têm dos serviços é bastante crucial no desenvolvimento e optimização dos serviços nas redes. É ainda de salientar que o aumento do tráfego multimédia, nomeadamente os streamings de vídeo, apresenta incrementos na probabilidade de as redes se congestionarem. Na perspectiva do prestador de serviços a monitorização é a solução para evitar a saturação total. Neste sentido, esta dissertação pretende desenvolver uma plataforma que permite a monitorização do tráfego de multimédia do serviço do Meo Go, fornecido pela operadora Portugal Telecom Comunicações. Neste trabalho foi necessário investigar e testar a arquitectura do streaming adaptativo sobre HTTP para ser possível obter métricas de qualidade de experiência. Este streaming adaptativo apresenta a técnica de smooth streaming, sendo esta arquitectura projectada pela empresa Microsoft e utilizada no serviço Meo Go. Posteriormente foram monitorizadas as métricas que se obtiveram no player de vídeo. Esta análise foi realizada de forma objectiva e subjectiva. Nesta fase da implementação objectiva do método em que se pretende obter uma predição do valor de Qualidade de Experiência por parte do consumidor, foram seleccionadas as métricas oriundas do estado/desempenho da rede e do dispositivo terminal. As métricas obtidas entram num processo de tratamento que pretende simular a ação humana nas classificações da qualidade dos vídeos. De outra forma, subjectivamente, foi realizada uma pesquisa, com base num questionário, de modo a comparar os métodos. Nesta etapa foi gerada uma plataforma online que possibilitou obter um maior número de classificações dos vídeos para posteriormente se proceder ao tratamento de dados. Nos resultados obtidos, primeiramente ao nível do player de smooth streaming, estes permitem analisar a técnica de implementação de streaming adaptativo. Numa fase seguinte foram criados cenários de teste para comprovar o funcionamento do método em diversas situações, tendo com maior relevância aqueles que contêm dinâmicas mais complexas. Na perspectiva dos métodos subjectivo e objectivo, estes apresentam valores que confirmam a arquitectura do módulo implementado. Adicionalmente, o desempenho do método em classificar a qualidade de serviço de vídeo streaming, ao longo do tempo, apresentou valores que se aproximam da dinâmica esperada numa ação mental humana

An Automated Dna Strands Detection System Featuring 32-Bit Arm7tdmi Microcontroller And Vga-Cmos Digital Image Sensor.

Genetic DNA recognition is a routine experiment for detecting the origin of the species. Electrophoresis is one of the processes for such detection which has been used extensively. Pengecaman genetik DNA ialah eksperimen rutin untuk mengesan asal usul sesuatu spesis. Proses electrophoresis ialah salah satu proses pengecaman yang digunakan secara meluas

High-speed equalization and transmission in electrical interconnections

The relentless growth of data traffic and increasing digital signal processing capabilities of integrated circuits (IC) are demanding ever faster chip-to-chip / chip-to-module serial electrical interconnects. As data rates increase, the signal quality after transmission over printed circuit board (PCB) interconnections is severely impaired. Frequency-dependent loss and crosstalk noise lead to a reduced eye opening, a reduced signal-to-noise ratio and an increased inter-symbol interference (ISI). This, in turn, requires the use of improved signal processing or PCB materials, in order to overcome the bandwidth (BW) limitations and to improve signal integrity. By applying an optimal combination of equalizer and receiver electronics together with BW-efficient modulation schemes, the transmission rate over serial electrical interconnections can be pushed further. At the start of this research, most industrial backplane connectors, meeting the IEEE and OIF specifications such as manufactured by e.g. FCI or TE connectivity, had operational capabilities of up to 25 Gb/s. This research was mainly performed under the IWT ShortTrack project. The goal of this research was to increase the transmission speed over electrical backplanes up to 100 Gb/s per channel for next-generation telecom systems and data centers. This requirement greatly surpassed the state-ofthe-art reported in previous publications, considering e.g. 25 Gb/s duobinary and 42.8 Gb/s PAM-4 transmission over a low-loss Megtron 6 electrical backplane using off-line processing. The successful implementation of the integrated transmitter (TX) and receiver (RX) (1) , clearly shows the feasibility of single lane interconnections beyond 80 Gb/s and opens the potential of realizing industrial 100 Gb/s links using a recent IC technology process. Besides the advancement of the state-of-the-art in the field of high-speed transceivers and backplane transmission systems, which led to several academic publications, the output of this work also attracts a lot of attention from the industry, showing the potential to commercialize the developed chipset and technologies used in this research for various applications: not only in high-speed electrical transmission links, but also in high-speed opto-electronic communications such as access, active optical cables and optical backplanes. In this dissertation, the background of this research, an overview of this work and the thesis organization are illustrated in Chapter 1. In Chapter 2, a system level analysis is presented, showing that the channel losses are limiting the transmission speed over backplanes. In order to enhance the serial data rate over backplanes and to eliminate the signal degradation, several technologies are discussed, such as signal equalization and modulation techniques. First, a prototype backplane channel, from project partner FCI, implemented with improved backplane connectors is characterized. Second, an integrated transversal filter as a feed-forward equalizer (FFE) is selected to perform the signal equalization, based on a comprehensive consideration of the backplane channel performance, equalization capabilities, implementation complexity and overall power consumption. NRZ, duobinary and PAM-4 are the three most common modulation schemes for ultra-high speed electrical backplane communication. After a system-level simulation and comparison, the duobinary format is selected due to its high BW efficiency and reasonable circuit complexity. Last, different IC technology processes are compared and the ST microelectronics BiCMOS9MW process (featuring a fT value of over 200 GHz) is selected, based on a trade-off between speed and chip cost. Meanwhile it also has a benefit for providing an integrated microstrip model, which is utilized for the delay elements of the FFE. Chapter 3 illustrates the chip design of the high-speed backplane TX, consisting of a multiplexer (MUX) and a 5-tap FFE. The 4:1 MUX combines four lower rate streams into a high-speed differential NRZ signal up to 100 Gb/s as the FFE input. The 5-tap FFE is implemented with a novel topology for improved testability, such that the FFE performance can be individually characterized, in both frequency- and time-domain, which also helps to perform the coefficient optimization of the FFE. Different configurations for the gain cell in the FFE are compared. The gilbert configuration shows most advantages, in both a good high-frequency performance and an easy way to implement positive / negative amplification. The total chip, including the MUX and the FFE, consumes 750mW from a 2.5V supply and occupies an area of 4.4mm × 1.4 mm. In Chapter 4, the TX chip is demonstrated up to 84 Gb/s. First, the FFE performance is characterized in the frequency domain, showing that the FFE is able to work up to 84 Gb/s using duobinary formats. Second, the combination of the MUX and the FFE is tested. The equalized TX outputs are captured after different channels, for both NRZ and duobinary signaling at speeds from 64 Gb/s to 84 Gb/s. Then, by applying the duobinary RX 2, a serial electrical transmission link is demonstrated across a pair of 10 cm coax cables and across a 5 cm FX-2 differential stripline. The 5-tap FFE compensates a total loss between the TX and the RX chips of about 13.5 dB at the Nyquist frequency, while the RX receives the equalized signal and decodes the duobinary signal to 4 quarter rate NRZ streams. This shows a chip-to-chip data link with a bit error rate (BER) lower than 10−11. Last, the electrical data transmission between the TX and the RX over two commercial backplanes is demonstrated. An error-free, serial duobinary transmission across a commercial Megtron 6, 11.5 inch backplane is demonstrated at 48 Gb/s, which indicates that duobinary outperforms NRZ for attaining higher speed or longer reach backplane applications. Later on, using an ExaMAX® backplane demonstrator, duobinary transmission performance is verified and the maximum allowed channel loss at 40 Gb/s transmission is explored. The eye diagram and BER measurements over a backplane channel up to 26.25 inch are performed. The results show that at 40 Gb/s, a total channel loss up to 37 dB at the Nyquist frequency allows for error-free duobinary transmission, while a total channel loss of 42 dB was overcome with a BER below 10−8. An overview of the conclusions is summarized in Chapter 5, along with some suggestions for further research in this field. (1) The duobinary receiver was developed by my colleague Timothy De Keulenaer, as described in his PhD dissertation. (2) Described in the PhD dissertation of Timothy De Keulenaer

Homogeneous and heterogeneous MPSoC architectures with network-on-chip connectivity for low-power and real-time multimedia signal processing

Two multiprocessor system-on-chip (MPSoC) architectures are proposed and compared in the paper with reference to audio and video processing applications. One architecture exploits a homogeneous topology; it consists of 8 identical tiles, each made of a 32-bit RISC core enhanced by a 64-bit DSP coprocessor with local memory. The other MPSoC architecture exploits a heterogeneous-tile topology with on-chip distributed memory resources; the tiles act as application specific processors supporting a different class of algorithms. In both architectures, the multiple tiles are interconnected by a network-on-chip (NoC) infrastructure, through network interfaces and routers, which allows parallel operations of the multiple tiles. The functional performances and the implementation complexity of the NoC-based MPSoC architectures are assessed by synthesis results in submicron CMOS technology. Among the large set of supported algorithms, two case studies are considered: the real-time implementation of an H.264/MPEG AVC video codec and of a low-distortion digital audio amplifier. The heterogeneous architecture ensures a higher power efficiency and a smaller area occupation and is more suited for low-power multimedia processing, such as in mobile devices. The homogeneous scheme allows for a higher flexibility and easier system scalability and is more suited for general-purpose DSP tasks in power-supplied devices

Design of Energy-Efficient A/D Converters with Partial Embedded Equalization for High-Speed Wireline Receiver Applications

As the data rates of wireline communication links increases, channel impairments such as skin effect, dielectric loss, fiber dispersion, reflections and cross-talk become more pronounced. This warrants more interest in analog-to-digital converter (ADC)-based serial link receivers, as they allow for more complex and flexible back-end digital signal processing (DSP) relative to binary or mixed-signal receivers. Utilizing this back-end DSP allows for complex digital equalization and more bandwidth-efficient modulation schemes, while also displaying reduced process/voltage/temperature (PVT) sensitivity. Furthermore, these architectures offer straightforward design translation and can directly leverage the area and power scaling offered by new CMOS technology nodes. However, the power consumption of the ADC front-end and subsequent digital signal processing is a major issue. Embedding partial equalization inside the front-end ADC can potentially result in lowering the complexity of back-end DSP and/or decreasing the ADC resolution requirement, which results in a more energy-effcient receiver. This dissertation presents efficient implementations for multi-GS/s time-interleaved ADCs with partial embedded equalization. First prototype details a 6b 1.6GS/s ADC with a novel embedded redundant-cycle 1-tap DFE structure in 90nm CMOS. The other two prototypes explain more complex 6b 10GS/s ADCs with efficiently embedded feed-forward equalization (FFE) and decision feedback equalization (DFE) in 65nm CMOS. Leveraging a time-interleaved successive approximation ADC architecture, new structures for embedded DFE and FFE are proposed with low power/area overhead. Measurement results over FR4 channels verify the effectiveness of proposed embedded equalization schemes. The comparison of fabricated prototypes against state-of-the-art general-purpose ADCs at similar speed/resolution range shows comparable performances, while the proposed architectures include embedded equalization as well

Future Mobile Communications: LTE Optimization and Mobile Network Virtualization

Providing QoS while optimizing the LTE network in a cost efficient manner is very challenging. Thus, radio scheduling is one of the most important functions in mobile broadband networks. The design of a mobile network radio scheduler holds several objectives that need to be satisfied, for example: the scheduler needs to maximize the radio performance by efficiently distributing the limited radio resources, since the operator's revenue depends on it. In addition, the scheduler has to guarantee the user's demands in terms of their Quality of Service (QoS). Thus, the design of an effective scheduler is rather a complex task. In this thesis, the author proposes the design of a radio scheduler that is optimized towards QoS guarantees and system performance optimization. The proposed scheduler is called Optimized Service Aware Scheduler (OSA). The OSA scheduler is tested and analyzed in several scenarios, and is compared against other well-known schedulers. A novel wireless network virtualization framework is also proposed in this thesis. The framework targets the concepts of wireless virtualization applied within the 3GPP Long Term Evolution (LTE) system. LTE represents one of the new mobile communication systems that is just entering the market. Therefore, LTE was chosen as a case study to demonstrate the proposed wireless virtualization framework. The framework is implemented in the LTE network simulator and analyzed, highlighting the many advantages and potential gain that the virtualization process can achieve. Two potential gain scenarios that can result from using network virtualization in LTE systems are analyzed: Multiplexing gain coming from spectrum sharing, and multi-user diversity gain. Several LTE radio analytical models, based on Continuous Time Markov Chains (CTMC) are designed and developed in this thesis. These models target the modeling of three different time domain radio schedulers: Maximum Throughput (MaxT), Blind Equal Throughput (BET), and Optimized Service Aware Scheduler (OSA). The models are used to obtain faster results (i.e., in a very short time period in the order of seconds to minutes), compared to the simulation results that can take considerably longer periods, such as hours or sometimes even days. The model results are also compared against the simulation results, and it is shown that it provides a good match. Thus, it can be used for fast radio dimensioning purposes. Overall, the concepts, investigations, and the analytical models presented in this thesis can help mobile network operators to optimize their radio network and provide the necessary means to support services QoS differentiations and guarantees. In addition, the network virtualization concepts provides an excellent tool that can enable the operators to share their resources and reduce their cost, as well as provides good chances for smaller operators to enter the market

Design of CMOS transimpedance amplifiers for remote antenna units in fiber-wireless systems.

La memoria de la tesis doctoral: Diseño de Amplificadores de Transimpedancia para Unidades de Antena Remota en Sistemas Fibra-Inalámbrico, se presenta en la modalidad de compendio de Publicaciones. A continuación, se expone un resumen del contexto, motivation y objetivos de la tesis.A lo largo de las últimas décadas, los avances tecnológicos y el esfuerzo por desarrollar nuevos sistemas de comunicaciones han crecido al ritmo que la demanda de información aumentaba a nivel mundial. Desde la aparición de Internet, el tráfico global de datos ha incrementado de forma exponencial y se han creado infinidad de aplicaciones y contenidos desde entonces.Con la llegada de la fibra óptica se produjo un avance muy significativo en el campo de las comunicaciones, ya que la fibra de vidrio y sus características fueron la clave para crear redes de largo alcance y alta velocidad. Por otro lado, los avances en las tecnologías de fabricación de circuitos integrados y de dispositivos fotónicos de alta velocidad han encabezado el desarrollo de los sistemas de comunicaciones ópticos, logrando incrementar la tasa de transmisión de datos hasta prácticamente alcanzar el ancho de banda de la fibra óptica.Para conseguir una mayor eficiencia en las comunicaciones y aumentar la tasa de transferencia, se necesitan métodos de modulación complejos que aprovechen mejor el ancho de banda disponible. No obstante, esta mayor complejidad de la modulación de los datos requiere sistemas con mejores prestaciones en cuanto a rango dinámico y linealidad. Estos esquemas de modulación se emplean desde hace tiempo en los sistemas de comunicaciones inalámbricos, donde el ancho de banda del canal, el aire, es extremadamente limitado y codiciado.Actualmente, los sistemas inalámbricos se enfrentan a una saturación del espectro que supone un límite a la tasa de transmisión de datos. Pese a los esfuerzos por extender el rango frecuencial a bandas superiores para aumentar el ancho de banda disponible, se espera un enorme aumento tanto en el número de dispositivos, como en la cantidad de datos demandados por usuario.Ante esta situación se han planteado distintas soluciones para superar estas limitaciones y mejorar las prestaciones de los sistemas actuales. Entre estas alternativas están los sistemas mixtos fibra-inalámbrico utilizando sistemas de antenas distribuidas (DAS). Estos sistemas prometen ser una solución económica y muy efectiva para mejorar la accesibilidad de los dispositivos inalámbricos, aumentando la cobertura y la tasa de transferencia de las redes a la vez que disminuyen las interferencias. El despliegue de los DAS tendrá un gran efecto en escenarios tales como edificios densamente poblados, hospitales, aeropuertos o edificios de oficinas, así como en áreas residenciales, donde un gran número de dispositivos requieren una cada vez mayor interconectividad.Dependiendo del modo de transmisión de los datos a través de la fibra, los sistemas mixtos fibra-inalámbrico se pueden categorizar de tres formas distintas: Banda base sobre fibra (BBoF), radiofrecuencia sobre fibra (RFoF) y frecuencia intermedia sobre fibra (IFoF). Actualmente, el esquema BBoF es el más utilizado para transmisiones de larga y media distancia. No obstante, utilizar este esquema en un DAS requiere unidades de antena remota (RAU) complejas y costosas, por lo que no está claro que esta configuración pueda ser viable en aplicaciones de bajo coste que requieran de un gran número de RAUs. Los sistemas RFoF e IFoF presentan esquemas más simples, sin necesidad de integrar un modulador/demodulador, puesto que la señal se procesa en una estación base y no en las propias RAUs.El desarrollo de esta tesis se enmarca en el estudio de los distintos esquemas de DAS. A lo largo de esta tesis se presentan varias propuestas de amplificadores de transimpedancia (TIA) adecuadas para su implementación en cada uno de los tres tipos de RAU existentes. La versatilidad y el amplio campo de aplicación de este circuito integrado, tanto en comunicaciones como en otros ámbitos, han motivado el estudio de la implementación de este bloque específico en las diferentes arquitecturas de RAU y en otros sistemas, tales como un receptor de televisión por cable (CATV) o una interfaz de un microsensor inercial capacitivo.La memoria de tesis se ha dividido en tres capítulos. El Capítulo 1 se ha empleado para introducir el concepto de los DAS, proporcionando el contexto y la motivación del diseño de las RAU, partiendo desde los principios básicos de operación de los dispositivos fotónicos y electrónicos y presentando las distintas arquitecturas de RAU. El Capítulo 2 supone el núcleo principal de la tesis. En este capítulo se presenta el estudio y diseño de los diferentes TIAs, que han sido optimizados respectivamente para cada una de las configuraciones de RAU, así como para otras aplicaciones. En un tercer capítulo se recogen los resultados más relevantes y se exponen las conclusiones de este trabajo.Tras llevar a cabo la descripción y comparación de las topologías existentes de TIA, se ha llegado a las siguientes conclusiones, las cuales nos llevan a elegir la topología shunt-feedback como la más adecuada para el diseño: - El compromiso entre ancho de banda, transimpedancia, consumo de potencia y ruido es menos restrictivo en los TIAs de lazo cerrado. - Los TIAs de lazo cerrado tienen un mayor número de grados de libertad para acometer su diseño. - Esta topología presenta una mejor linealidad gracias al lazo de realimentación. Si la respuesta frecuencial del núcleo del amplificador se ajusta de manera adecuada, el TIA shunt-feedback puede presentar una respuesta frecuencial plana y estable.En esta tesis, se ha propuesto una nueva técnica de reducción de ruido, aplicable en receptores ópticos con fotodiodos con un área activa grande (~1mm2). Esta estrategia, que se ha llamado la técnica del fotodiodo troceado, consiste en la fabricación del fotodiodo, no como una estructura única, sino como un array de N sub-fotodiodos, que ocuparían la misma área activa que el original. Las principales conclusiones tras hacer un estudio teórico y realizar un estudio de su aplicación en una de las topologías de TIA propuestas son: - El ruido equivalente a la entrada es menor cuanto mayor es el número de sub-fotodiodos, dado que la contribución al ruido que depende con el cuadrado de la frecuencia (f^2) decrece con una dependencia proporcional a N. - Con una aplicación simple de la técnica, replicando el amplificador de tensión del TIA N veces y utilizando N resistencias de realimentación, cada una con un valor N veces el original, la sensibilidad del receptor aumenta aproximadamente en un factor √N y la estabilidad del sistema no se ve afectada. - Al dividir el fotodiodo en N sub-fotodiodos, la capacidad parásita de cada uno de ellos es N veces menor a la original. Con esta nueva capacidad parásita, el diseño del TIA se puede optimizar, consiguiendo una sensibilidad mucho mejor que con un único fotodiodo para el mismo valor de consumo de potencia.Las principales conclusiones respecto a los diseños de los distintos TIAs para comunicaciones son las siguientes: TIA para BBoF: - El TIA propuesto, alcanza, con un consumo de tan solo 2.9 mW, un ancho de banda de 1 GHz y una sensibilidad de -11 dBm, superando las características de trabajos anteriores en condiciones similares (capacidad del fotodiodo, tecnología y tasa de transmisión). - La técnica del fotodiodo troceado se ha aplicado a este circuito, consiguiendo una mejora de hasta 7.9 dBm en la sensibilidad para un diseño optimizado de 16 sub-fotodiodos, demostrando, en una simulación a nivel de transistor, que la técnica propuesta funciona correctamente. TIA para RFoF: - El diseño propuesto logra una figura de mérito superior a la de trabajos previos, gracias a la combinación de su bajo consumo de potencia y su mayor transimpedancia. - Además, mientras que en la mayoría de trabajos previos no se integra un control de ganancia en el TIA, esta propuesta presenta una transimpedancia controlable desde 45 hasta 65 dBΩ. A través de un sistema de control simultáneo de la transimpedancia y de la ganancia en lazo abierto del amplificador de voltaje, se consigue garantizar una respuesta frecuencial plana y estable en todos los estados de transimpedancia, que le otorga al diseño una superior versatilidad y flexibilidad. TIA para CATV: - Se ha adaptado una versión del TIA para RFoF para demostrar la capacidad de adaptación de esta estructura en una implementación en un receptor CATV con un rango de control de transimpedancia de 18 dB. - Con la implementación del control de ganancia en el TIA, no es necesario el uso de un atenuador variable en el receptor, simplificando así el número de etapas del mismo. - Gracias al control de transimpedancia, el TIA logra rangos de entrada similares a los publicados en trabajos anteriores basados en una tecnología mucho menos accesible como GaAs PHEMT. TIA para IFoF Se ha fabricado un chip en una tecnología CMOS de 65 nm que opera a 1.2 V de tensión de alimentación y se ha realizado su caracterización eléctrica y óptica. - El TIA presenta una programabilidad de su transimpedancia con un control lineal en dB entre 60 y 76 dBΩ mediante un código termómetro de 4 bits. - El ancho de banda se mantiene casi constante en todo el rango de transimpedancia, entre 500 y 600 MHz.Como conclusión general tras comparar el funcionamiento de los TIAs para las distintas configuraciones de RAU, vale la pena mencionar que el TIA para IFoF consigue una figura de mérito muy superior a la de otros trabajos previos diseñados para RFoF. Esto se debe principalmente a la mayor transimpedancia y al muy bajo consumo de potencia del TIA para IFoF propuesto. Además, se consigue una mejor linealidad, ya que, para una transmisión de 54 Mb/s con el estándar 802.11a, se consigue un EVM menor de 2 % en un rango de entrada de 10 dB, comparado con los entre 3 y 5 dB reportados en trabajos previos. El esquema IFoF presenta un gran potencial y ventajas frente al RFoF, lo que lo coloca como una buena alternativa para disminuir los costes y mejorar el rendimiento de los sistemas de antenas distribuidas.Por último, cabe destacar que el diseño de TIA propuesto y fabricado para IFoF contribuye en gran medida al desarrollo y validación de una RAU completa. Se ha demostrado la capacidad de la estructura propuesta para alcanzar un bajo ruido, alta linealidad, simplicidad en la programabilidad de la transimpedancia y adaptabilidad de la topología para diferentes requisitos, lo cual es de un gran interés en el diseño de receptores ópticos.Por otra parte, una versión del TIA para su uso en una interfaz de sensores MEMS capacitivos se ha propuesto y estudiado. Consiste en un convertidor capacidad-voltaje basado en una versión del TIA para RFoF, con el objetivo de conseguir un menor ruido y proveer de una adaptabilidad para diferentes sensores capacitivos. Los resultados más significativos y las conclusiones de este diseño se resumen a continuación: - El TIA presenta un control de transimpedancia con un rango de 34 dB manteniendo el ancho de banda constante en 1.2 MHz. También presenta un control independiente del ancho de banda, desde 75 kHz hasta 1.2 MHz, manteniendo la transimpedancia fija en un valor máximo. - Con un consumo de potencia de tan solo 54 μW, el TIA alcanza una sensibilidad máxima de 1 mV/fF, que corresponde a una sensibilidad de 4.2 mV/g y presenta un ruido de entrada de tan solo 100 µg/√("Hz" ) a 50 kHz en la configuración de máxima transimpedancia.La principal conclusión que destaca de este diseño es su versatilidad y flexibilidad. El diseño propuesto permite adaptar fácilmente la respuesta de la interfaz a una amplia gama de dispositivos sensores, ya que se puede ajustar el ancho de banda para ajustarse a distintas frecuencias de operación, así como la transimpedancia puede ser modificada para conseguir distintas sensibilidades. Este doble control independiente de ancho de banda y transimpedancia le proporcionan una adaptabilidad completa al TIA.<br /

LTE Optimization and Resource Management in Wireless Heterogeneous Networks

Mobile communication technology is evolving with a great pace. The development of the Long Term Evolution (LTE) mobile system by 3GPP is one of the milestones in this direction. This work highlights a few areas in the LTE radio access network where the proposed innovative mechanisms can substantially improve overall LTE system performance. In order to further extend the capacity of LTE networks, an integration with the non-3GPP networks (e.g., WLAN, WiMAX etc.) is also proposed in this work. Moreover, it is discussed how bandwidth resources should be managed in such heterogeneous networks. The work has purposed a comprehensive system architecture as an overlay of the 3GPP defined SAE architecture, effective resource management mechanisms as well as a Linear Programming based analytical solution for the optimal network resource allocation problem. In addition, alternative computationally efficient heuristic based algorithms have also been designed to achieve near-optimal performance

Considering Bluetooth's Subband Codec (SBC) for Wideband Speech and Audio on the Internet

The Bluetooth Special Interest Group (SIG) has standardized the subband coding (SBC) audio codec to connect headphones via wireless Bluetooth links. SBC compresses audio at high fidelity while having an ultra-low algorithm delay. To make SBC suitable for the Internet, we extend it by using a time and packet loss concealment (PLC) algorithm that is based on ITU's G.711 Appendix I. The design is novel in the aspect of the interface between codec and speech receiver. We developed a new approach on how to distribute the functionality of a speech receiver between codec and application. Our approach leads to easier implementations of high quality VoIP applications. We conducted subjective and objective listening tests of the audio quality of SBC and PLC in order to determine an optimal coding mode and the trade-off between coding mode and packet loss rate. More precisely, we conducted MUSHRA listening tests for selected sample items. These tests results are then compared with the results of multiple objective assessment algorithms (ITU P.862 PESQ, ITU BS.1387-1 PEAQ, Creusere's algorithm). We found out that a combination of the PEAQ basic and advanced values best matches---after third order linear regression---the subjective MUSHRA results . The linear regression has coefficient of determination of R²=0.907². By comparison, our individual human ratings show a correlation of about R=0.9 compared to our averaged human rating results. Using the combination of both PEAQ algorithms, we calculate hundred thousands of objective audio quality ratings varying audio content and algorithmic parameters of SBC and PLC. The results show which set of parameters value are best suitable for a bandwidth and delay constrained link. The transmission quality of SBC is enhanced significantly by selecting optimal encoding parameters as compared to the default parameter sets given in the standard. Finally, we present preliminary objective tests results on the comparison of the audio codecs SBC, CELT, APT-X and ULD coding speech and audio transmission. They all allow a mono and stereo transmission of music at ultra-low coding delays (<10ms), which is especially useful for distributed ensemble performances over the Internet