Video Decoder Reconfigurations and AVS Extensions in the New MPEG Reconfigurable Video Coding Framework

In 2004, ISO/IEC SC29 better known as MPEG started a new standard initiative aiming at facilitating the deployment of multi-format video codec design and to enable the possibility of reconfiguring video codecs using a library of standard components. The new standard under development is called MPEG Reconfigurable Video Coding (RVC) framework. Whereas video coding tools are specified in the RVC library, when a new decoder is reconfigured choosing in principle any (sub)-set of tools, the corresponding bitstream syntax, described using MPEG-21 BSDL schema, and the associated parser need to be respectively derived and instantiated reconfiguration by reconfiguration. Therefore, the development of an efficient systematic procedure able to instantiate efficient bitstream parsing and particularly variable length decoding is an important component in RVC. This paper introduces an efficient data flow based implementation of the variable length decoding (VLD) process particularly adapted for the instantiation and synthesis of CAL parsers in the MPEG RVC framework

Reconfigurable video coding: a stream programming approach to the specification of new video coding standards

International audienceCurrent video coding standards, and their reference implementations, are architected as large monolithic and sequential algorithms, in spite of the considerable overlap of functionality between standards, and the fact that they are frequently implemented on highly parallel computing platforms. The former leads to unnecessary complexity in the standardization process, while the latter implies that implementations have to be rebuilt from the ground up to reflect the parallel nature of the target. The upcoming Reconfigurable Video Coding (RVC) standard currently developed at MPEG attempts to address these issues by building a framework that supports the construction of video standards as libraries of coding tools. These libraries can be incrementally updated and extended, and the tools in them can be aggregated to form complete codecs using a streaming (or dataflow) programming model, which preserves the inherent parallelism of the coding algorithm. This paper presents the RVC framework and its underlying data flow programming model, along with the tool support and initial results

Reconfigurable Video Coding on multicore : an overview of its main objectives

International audienceThe current monolithic and lengthy scheme behind the standardization and the design of new video coding standards is becoming inappropriate to satisfy the dynamism and changing needs of the video coding community. Such scheme and specification formalism does not allow the clear commonalities between the different codecs to be shown, at the level of the specification nor at the level of the implementation. Such a problem is one of the main reasons for the typically long interval elapsing between the time a new idea is validated until it is implemented in consumer products as part of a worldwide standard. The analysis of this problem originated a new standard initiative within the International Organization for Standardization (ISO)/ International Electrotechnical Commission (IEC) Moving Pictures Experts Group (MPEG) committee, namely Reconfigurable Video Coding (RVC). The main idea is to develop a video coding standard that overcomes many shortcomings of the current standardization and specification process by updating and progressively incrementing a modular library of components. As the name implies, flexibility and reconfigurability are new attractive features of the RVC standard. Besides allowing for the definition of new codec algorithms, such features, as well as the dataflow-based specification formalism, open the way to define video coding standards that expressly target implementations on platforms with multiple cores. This article provides an overview of the main objectives of the new RVC standard, with an emphasis on the features that enable efficient implementation on platforms with multiple cores. A brief introduction to the methodologies that efficiently map RVC codec specifications to multicore platforms is accompanied with an example of the possible breakthroughs that are expected to occur in the design and deployment of multimedia services on multicore platforms

MPEG Reconfigurable Video Coding

WOS - ISBN: 978-1-4419-6344-4The currentmonolithic and lengthy scheme behind the standardization and the design of new video coding standards is becoming inappropriate to satisfy the dynamism and changing needs of the video coding community. Such a scheme and specification formalism do not enable designers to exploit the clear commonalities between the different codecs, neither at the level of the specification nor at the level of the implementation. Such a problem is one of the main reasons for the typical long time interval elapsing between the time a new idea is validated until it is implemented in consumer products as part of a worldwide standard. The analysis of this problem originated a new standard initiative within the ISO/IEC MPEG committee, called Reconfigurable Video Coding (RVC). The main idea is to develop a video coding standard that overcomes many shortcomings of the current standardization and specification process by updating and progressively incrementing a modular library of components. As the name implies, flexibility and reconfigurability are new attractive features of the RVC standard. The RVC framework is based on the usage of a new actor/dataflow oriented language called CAL for the specification of the standard library and the instantiation of the RVC decoder model. CAL dataflow models expose the intrinsic concurrency of the algorithms by employing the notions of actor programming and dataflow. This chapter gives an overview of the concepts and technologies building the standard RVC framework and the non standard tools supporting the RVC model from the instantiation and simulation of the CAL model to the software and/or hardware code synthesis

Reconfigurable Video Coding : Objectives and Technologies

The main objective of the MPEG Reconfigurable Video Coding (RVC) standard is to establish a framework for a more flexible usage of standard video coding technology. The framework not only supports multiple standards and new coding configurations, but also provides an incremental and modular approach to innovation in video compression development and design. This paper provides an overview of the main objectives of RVC, standard accompanied with a presentation of the components of the framework for both normative parts and supporting tools useful for the final implementation of RVC codecs. These elements include: the Video Tool Library (VTL), the new standard RVC–CAL language used for the specification of the library, the Bitstream Syntax Description (BSD) used for the specification of the compressed bitstreams, as well as the Functional unit Network Description (FND) that constitutes the specification of a modular library. Technologies and tools that support the RVC standard are also briefly introduced

Towards a Multi-Granular RVC VTL: A Case Study of CAL Transformations on the ISO/IEC MPEG Fixed Point IDCT

Recent advances in digital video hardware, software and coding standards have led to a wide variety of digital video products. However, such continuous evolution leads to the necessity of regular replacements of the available multimedia devices. To avoid this, a new initiative within the MPEG community, namely Reconfigurable Video Coding, has risen to provide the flexible framework that allows for the “simple” realization of highly-reconfigurable video coding solutions, without the need to wait for decades to replace the existing infrastructure. This paper illustrates the different design schemes to build various platform-specific proprietary libraries, at various granularity levels, together with a case study to prove the concept

Architectures for Adaptive Low-Power Embedded Multimedia Systems

This Ph.D. thesis describes novel hardware/software architectures for adaptive low-power embedded multimedia systems. Novel techniques for run-time adaptive energy management are proposed, such that both HW & SW adapt together to react to the unpredictable scenarios. A complete power-aware H.264 video encoder was developed. Comparison with state-of-the-art demonstrates significant energy savings while meeting the performance constraint and keeping the video quality degradation unnoticeable