9,563 research outputs found
Path allocation in a three-stage broadband switch with intermediate channel grouping
A method for path allocation for use with three-stage ATM switches that feature multiple channels between the switch modules in adjacent stages is described. The method is suited to hardware implementation using parallelism to achieve a very short execution time. This allows path allocation to be performed anew in each time slot. A detailed description of the necessary hardware is presented. This hardware counts the number of cells requesting each output module, allocates a path through the intermediate stage of the switch to each cell, and generates a routing tag for each cell, indicating the path assigned to i
A three-stage ATM switch with cell-level path allocation
A method is described for performing routing in three-stage asynchronous transfer mode (ATM) switches which feature multiple channels between the switch modules in adjacent stages. The method is suited to hardware implementation using parallelism to achieve a very short execution time. This allows cell-level routing to be performed, whereby routes are updated in each time slot. The algorithm allows a contention-free routing to be performed, so that buffering is not required in the intermediate stage. An algorithm with this property, which preserves the cell sequence, is referred to as a path allocation algorithm. A detailed description of the necessary hardware is presented. This hardware uses a novel circuit to count the number of cells requesting each output module, it allocates a path through the intermediate stage of the switch to each cell, and it generates a routing tag for each cell, indicating the path assigned to it. The method of routing tag assignment described employs a nonblocking copy network. The use of highly parallel hardware reduces the clock rate required of the circuitry, for a given-switch size. The performance of ATM switches using this path allocation algorithm has been evaluated by simulation, and is described
Precoding-Based Network Alignment For Three Unicast Sessions
We consider the problem of network coding across three unicast sessions over
a directed acyclic graph, where each sender and the receiver is connected to
the network via a single edge of unit capacity. We consider a network model in
which the middle of the network only performs random linear network coding, and
restrict our approaches to precoding-based linear schemes, where the senders
use precoding matrices to encode source symbols. We adapt a precoding-based
interference alignment technique, originally developed for the wireless
interference channel, to construct a precoding-based linear scheme, which we
refer to as as a {\em precoding-based network alignment scheme (PBNA)}. A
primary difference between this setting and the wireless interference channel
is that the network topology can introduce dependencies between elements of the
transfer matrix, which we refer to as coupling relations, and can potentially
affect the achievable rate of PBNA. We identify all possible such coupling
relations, and interpret these coupling relations in terms of network topology
and present polynomial-time algorithms to check the presence of these coupling
relations. Finally, we show that, depending on the coupling relations present
in the network, the optimal symmetric rate achieved by precoding-based linear
scheme can take only three possible values, all of which can be achieved by
PBNA.Comment: arXiv admin note: text overlap with arXiv:1202.340
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A decision support environment for behavioral synthesis
We present a specification of a general environment for behavioral synthesis centered around the user/designer as the primary motivator for decisions in design development. At each stage of the design process, the user can perform transformations on the design description through graphical user interfaces. Quality measures, physical estimates, and design hints are given to the user at each stage
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