Very Low Cost Entropy Source Based on Chaotic Dynamics Retrofittable on Networked Devices to Prevent RNG Attacks

Good quality entropy sources are indispensable in most modern cryptographic protocols. Unfortunately, many currently deployed networked devices do not include them and may be vulnerable to Random Number Generator (RNG) attacks. Since most of these systems allow firmware upgrades and have serial communication facilities, the potential for retrofitting them with secure hardware-based entropy sources exists. To this aim, very low-cost, robust, easy to deploy solutions are required. Here, a retrofittable, sub 10$ entropy source based on chaotic dynamics is illustrated, capable of a 32 kbit/s rate or more and offering multiple serial communication options including USB, I2C, SPI or USART. Operation is based on a loop built around the Analog to Digital Converter (ADC) hosted on a standard microcontroller.Comment: 4 pages, 6 figures. Pre-print from conference proceedings; IEEE 21th International Conference on Electronics, Circuits, and Systems (ICECS 2014), pp. 175-178, Dec. 201

A Novel TRNG Based on Traditional ADC Nonlinear Effect and Chaotic Map for IoT Security and Anticollision

In the rapidly developing Internet of Things (IoT) applications, how to achieve rapid identification of massive devices and secure the communication of wireless data based on low cost and low power consumption is the key problem to be solved urgently. This paper proposes a novel true random number generator (TRNG) based on ADC nonlinear effect and chaotic map, which can be implemented by traditional processors with built-in ADCs, such as MCU, DSP, ARM, and FPGA. The processor controls the ADC to sample the changing input signal to obtain the digital signal DADC and then extracts some bits of DADC to generate the true random number (TRN). At the same time, after a delay based on DADC, the next time ADC sampling is carried out, and the cycle continues until the processor stops generating the TRN. Due to the nonlinear effect of ADC, the DADC obtained from each sampling is stochastic, and the changing input signal will sharply change the delay time, thus changing the sampling interval (called random interval sampling). As the input signal changes, DADC with strong randomness is obtained. The whole operation of the TRNG resembles a chaotic map, and this method also eliminates the pseudorandom property of chaotic map by combining the variable input signal (including noise) with the nonlinear effect of ADC. The simulation and actual test data are verified by NIST, and the verification results show that the random numbers generated by the proposed method have strong randomness and can be used to implement TRNG. The proposed TRNG has the advantages of low cost, low power consumption, and strong compatibility, and the rate of generating true random number is more than 1.6 Mbps (determined by ADC sampling rate and processor frequency), which is very suitable for IoT sensor devices for security encryption algorithms and anticollision

Kaos kaynaklı ve ADC tabanlı özgün gerçek rasgele sayı üreteçlerinin tasarım ve gerçeklenmesi

06.03.2018 tarihli ve 30352 sayılı Resmi Gazetede yayımlanan “Yükseköğretim Kanunu İle Bazı Kanun Ve Kanun Hükmünde Kararnamelerde Değişiklik Yapılması Hakkında Kanun” ile 18.06.2018 tarihli “Lisansüstü Tezlerin Elektronik Ortamda Toplanması, Düzenlenmesi ve Erişime Açılmasına İlişkin Yönerge” gereğince tam metin erişime açılmıştır.Bu tezde yapılan çalışmalar üç ana kısımdan oluşmaktadır. Birinci aşamada, sürekli zamanlı kaotik sistemlerin (SZKS) devre gerçeklemelerinin hızlı ve kolay yapılabilmesi için yeni bir bilgisayar ve mikro denetleyici kontrollü kaotik devre deney seti (KDDS) tasarlanmış ve gerçeklenmiştir. İkinci aşamada ADC tabanlı gerçek rasgele sayı üreteci (GRSÜ) tasarımlarının kolay, hızlı ve esnek yapılabilmesine olanak sağlayan yeni bir bilgisayar ve mikro denetleyici kontrollü bir platform (BMKP) tasarlanmış ve gerçeklenmiştir. Son aşamada ise gerçekleştirilen KDDS ve BMKP kullanılarak, uluslararası en üst düzey standart olan NIST800-22 testlerinin tamamından başarılıyla geçen yeni GRSÜ tasarım ve gerçeklemeleri yapılmıştır. Tezin birinci aşamasında ilk olarak GRSÜ tasarımları için entropi kaynağı olarak kullanılan referans kaotik sistemlerin analizleri yapılmıştır. İkinci olarak referans alınan kaotik sistemler analog devre elemanları ile modellenerek OrCAD-PSpice programında tasarlanan devrelerin faz portrelerine ait simülasyonlar yapılmıştır. Üçüncü olarak karmaşık ve uzun zaman alan kaotik devre gerçekleme işlemlerinin, kolay, hızlı ve esnek yapılabilmesi amacıyla, yeni bir KDDS tasarlanmış ve gerçekleştirilmiştir. Ardından referans alınan kaotik sistemlerin tasarlanan KDDS ile gerçek devreleri kurulmuş ve elde edilen gerçek devre osiloskop çıktıları, sistemlere ait Matlab, OrCAD-PSpice çıktıları ile karşılaştırılmıştır. İkinci aşamada ADC tabanlı olarak yapılacak olan GRSÜ tasarımlarında kullanılabilecek, yeni bir BMKP tasarlanmış ve gerçeklenmiştir. Bu sistemin özgün yönleri kaotik sistemlerin yanında sıcaklık, RF gibi farklı kaynakları da entropi kaynağı olarak kullanabilmesi, farklı entropi kaynaklarını karıştırarak kullanabilmesi, farklı son işlem algoritmalarının seçilebilmesi olarak sıralanabilir. Son aşamada, gerçekleştirilen KDDS ve BMKP kullanılarak, Rucklidge, Chen ve Zhongtang kaotik sistemleri tabanlı yeni GRSÜ tasarım ve gerçeklemeleri yapılmıştır. Gerçeklenen GRSÜ'ler, NIST800-22 testlerine tabi tutulmuştur. Chen ve Zhongtang kaotik sistemi tabanlı GRSÜ'ler tüm testlerden başarı ile geçmiştir. Anahtar kelimeler: Gerçek Rasgele Sayı Üreteci, İstatistiksel Rasgelelik Testleri, NIST Rasgelelik Testi, Kaos, Sürekli Zamanlı Kaotik Sistemler, Mikro denetleyicilerThe studies in this thesis consists of three main stages. At the first stage, a microcontroller and computer controlled chaotic circuit testing set (CCTS) for fast modelling of continuous-time chaotic systems (CTCS) has been designed and implemented. At the second stage, a microcontroller and computer controlled platform (MCCP) has been designed and implemented to design ADC based true random number generator (TRNG) fast and easily. At the last stage, new TRNGs pass the all of NIST-800-22 statistical tests, which is the highest international standards have been designed and implemented by using CCTS and MCCP for design of TRNG. At the first stage of the thesis, firstly reference chaotic systems used as entropy source of TRNG have been analyzed. Secondly, reference chaotic systems have been modeled by using analog circuit component and the phase portraits of chaotic electronic circuits modeled have been simulated in OrCAD-PSpice. Thirdly, a CCTS has been designed and implemented to make complex and extremely time-consuming process of chaotic circuit implementation fast and easily. After that, reference chaotic systems has been realized using CCTS and then oscilloscope outputs of real circuits have been compared with Mat lab, OrCAD-PSpice outputs. At the second stage, a MCCP has been designed and implemented to be used on design of ADC based TRNG fast and easily. The unique aspects of this system come from using chaotic system also different entropy sources such as radio frequency (RF), temperature as an entropy source, using different entropy sources by mixing each other, selecting different last processing algorithm. At the last stage, Rucklidge, Chen and Zhongtang chaotic systems based TRNGs have been designed and implemented using CCTS and MCCP. TRNGs realized has been subjected to NIST-800-22 statistical tests. Chen and Zhongtang chaotic system based TRNGs have passed successfully to NIST statistical tests. Keywords: True Random Number Generator, Statistical Randomness Tests, NIST Statistical Tests, Chaos, Continuous-time Chaotic Systems, Microcontrolle