European White Book on Real-Time Power Hardware in the Loop Testing : DERlab Report No. R- 005.0

The European White Book on Real-Time-Powerhardware-in-the-Loop testing is intended to serve as a reference document on the future of testing of electrical power equipment, with specifi c focus on the emerging hardware-in-the-loop activities and application thereof within testing facilities and procedures. It will provide an outlook of how this powerful tool can be utilised to support the development, testing and validation of specifi cally DER equipment. It aims to report on international experience gained thus far and provides case studies on developments and specifi c technical issues, such as the hardware/software interface. This white book compliments the already existing series of DERlab European white books, covering topics such as grid-inverters and grid-connected storag

Model Based Systems Engineering for a Venture Class Launch Facility

A study of Model-Based Systems Engineering (MBSE) applied to a small-lift launch facility is presented. The research uses Systems Modeling Language (SysML) products and functional diagrams to document the structure, controls, electrical power, hydraulic, safety mechanisms, software, and fluid ground systems on a launch pad. The research is motivated by the need to design complex systems with an unambiguous understanding that improves communication, quality, productivity, and reduces risk. A model is developed following the ISO/IEC-15288 technical process framework. The stakeholder requirements are defined and analyzed to provide traceability to individual systems and subsystems. An architectural design is realized and implemented by generating engineering artifacts such as Piping and Instrumentation drawings (P&ID) and a hydraulic circuit diagram. The architecture is verified and validated by performing engineering trade studies focused on the fuel and pneumatic systems

Conceptual design for the Space Station Freedom fluid physics/dynamics facility

A study team at NASA's Lewis Research Center has been working on a definition study and conceptual design for a fluid physics and dynamics science facility that will be located in the Space Station Freedom's baseline U.S. Laboratory module. This modular, user-friendly facility, called the Fluid Physics/Dynamics Facility, will be available for use by industry, academic, and government research communities in the late 1990's. The Facility will support research experiments dealing with the study of fluid physics and dynamics phenomena. Because of the lack of gravity-induced convection, research into the mechanisms of fluids in the absence of gravity will help to provide a better understanding of the fundamentals of fluid processes. This document has been prepared as a final version of the handout for reviewers at the Fluid Physics/Dynamics Facility Assessment Workshop held at Lewis on January 24 and 25, 1990. It covers the background, current status, and future activities of the Lewis Project Study Team effort. It is a revised and updated version of a document entitled 'Status Report on the Conceptual Design for the Space Station Fluid Physics/Dynamics Facility', dated January 1990

Pre-validation of SoC via hardware and software co-simulation

Abstract. System-on-chips (SoCs) are complex entities consisting of multiple hardware and software components. This complexity presents challenges in their design, verification, and validation. Traditional verification processes often test hardware models in isolation until late in the development cycle. As a result, cooperation between hardware and software development is also limited, slowing down bug detection and fixing. This thesis aims to develop, implement, and evaluate a co-simulation-based pre-validation methodology to address these challenges. The approach allows for the early integration of hardware and software, serving as a natural intermediate step between traditional hardware model verification and full system validation. The co-simulation employs a QEMU CPU emulator linked to a register-transfer level (RTL) hardware model. This setup enables the execution of software components, such as device drivers, on the target instruction set architecture (ISA) alongside cycle-accurate RTL hardware models. The thesis focuses on two primary applications of co-simulation. Firstly, it allows software unit tests to be run in conjunction with hardware models, facilitating early communication between device drivers, low-level software, and hardware components. Secondly, it offers an environment for using software in functional hardware verification. A significant advantage of this approach is the early detection of integration errors. Software unit tests can be executed at the IP block level with actual hardware models, a task previously only possible with costly system-level prototypes. This enables earlier collaboration between software and hardware development teams and smoothens the transition to traditional system-level validation techniques.Järjestelmäpiirin esivalidointi laitteiston ja ohjelmiston yhteissimulaatiolla. Tiivistelmä. Järjestelmäpiirit (SoC) ovat monimutkaisia kokonaisuuksia, jotka koostuvat useista laitteisto- ja ohjelmistokomponenteista. Tämä monimutkaisuus asettaa haasteita niiden suunnittelulle, varmennukselle ja validoinnille. Perinteiset varmennusprosessit testaavat usein laitteistomalleja eristyksissä kehityssyklin loppuvaiheeseen saakka. Tämän myötä myös yhteistyö laitteisto- ja ohjelmistokehityksen välillä on vähäistä, mikä hidastaa virheiden tunnistamista ja korjausta. Tämän diplomityön tavoitteena on kehittää, toteuttaa ja arvioida laitteisto-ohjelmisto-yhteissimulointiin perustuva esivalidointimenetelmä näiden haasteiden ratkaisemiseksi. Menetelmä mahdollistaa laitteiston ja ohjelmiston varhaisen integroinnin, toimien luonnollisena välietappina perinteisen laitteistomallin varmennuksen ja koko järjestelmän validoinnin välillä. Yhteissimulointi käyttää QEMU suoritinemulaattoria, joka on yhdistetty rekisterinsiirtotason (RTL) laitteistomalliin. Tämä mahdollistaa ohjelmistokomponenttien, kuten laiteajureiden, suorittamisen kohdejärjestelmän käskysarja-arkkitehtuurilla (ISA) yhdessä kellosyklitarkkojen RTL laitteistomallien kanssa. Työ keskittyy kahteen yhteissimulaation pääsovellukseen. Ensinnäkin se mahdollistaa ohjelmiston yksikkötestien suorittamisen laitteistomallien kanssa, varmistaen kommunikaation laiteajurien, matalan tason ohjelmiston ja laitteistokomponenttien välillä. Toiseksi se tarjoaa ympäristön ohjelmiston käyttämiseen toiminnallisessa laitteiston varmennuksessa. Merkittävä etu tästä lähestymistavasta on integraatiovirheiden varhainen havaitseminen. Ohjelmiston yksikkötestejä voidaan suorittaa jo IP-lohkon tasolla oikeilla laitteistomalleilla, mikä on aiemmin ollut mahdollista vain kalliilla järjestelmätason prototyypeillä. Tämä mahdollistaa aikaisemman ohjelmisto- ja laitteistokehitystiimien välisen yhteistyön ja helpottaa siirtymistä perinteisiin järjestelmätason validointimenetelmiin

Spacecraft servicing demonstration plan

A preliminary spacecraft servicing demonstration plan is prepared which leads to a fully verified operational on-orbit servicing system based on the module exchange, refueling, and resupply technologies. The resulting system can be applied at the space station, in low Earth orbit with an orbital maneuvering vehicle (OMV), or be carried with an OMV to geosynchronous orbit by an orbital transfer vehicle. The three phase plan includes ground demonstrations, cargo bay demonstrations, and free flight verifications. The plan emphasizes the exchange of multimission modular spacecraft (MMS) modules which involves space repairable satellites. Three servicer mechanism configurations are the engineering test unit, a protoflight quality unit, and two fully operational units that have been qualified and documented for use in free flight verification activity. The plan balances costs and risks by overlapping study phases, utilizing existing equipment for ground demonstrations, maximizing use of existing MMS equipment, and rental of a spacecraft bus

Space biology initiative program definition review. Trade study 2: Prototype utilization in the development of space biology hardware

The objective was to define the factors which space flight hardware developers and planners should consider when determining: (1) the number of hardware units required to support program; (2) design level of the units; and (3) most efficient means of utilization of the units. The analysis considered technology risk, maintainability, reliability, and safety design requirements for achieving the delivery of highest quality flight hardware. Relative cost impacts of the utilization of prototyping were identified. The development of Space Biology Initiative research hardware will involve intertwined hardware/software activities. Experience has shown that software development can be an expensive portion of a system design program. While software prototyping could imply the development of a significantly different end item, an operational system prototype must be considered to be a combination of software and hardware. Hundreds of factors were identified that could be considered in determining the quantity and types of prototypes that should be constructed. In developing the decision models, these factors were combined and reduced by approximately ten-to-one in order to develop a manageable structure based on the major determining factors. The Baseline SBI hardware list of Appendix D was examined and reviewed in detail; however, from the facts available it was impossible to identify the exact types and quantities of prototypes required for each of these items. Although the factors that must be considered could be enumerated for each of these pieces of equipment, the exact status and state of development of the equipment is variable and uncertain at this time

Validation and verification of the interconnection of hardware intellectual property blocks for FPGA-based packet processing systems

As networks become more versatile, the computational requirement for supporting additional functionality increases. The increasing demands of these networks can be met by Field Programmable Gate Arrays (FPGA), which are an increasingly popular technology for implementing packet processing systems. The fine-grained parallelism and density of these devices can be exploited to meet the computational requirements and implement complex systems on a single chip. However, the increasing complexity of FPGA-based systems makes them susceptible to errors and difficult to test and debug. To tackle the complexity of modern designs, system-level languages have been developed to provide abstractions suited to the domain of the target system. Unfortunately, the lack of formality in these languages can give rise to errors that are not caught until late in the design cycle. This thesis presents three techniques for verifying and validating FPGA-based packet processing systems described in a system-level description language. First, a type system is applied to the system description language to detect errors before implementation. Second, system-level transaction monitoring is used to observe high-level events on-chip following implementation. Third, the high-level information embodied in the system description language is exploited to allow the system to be automatically instrumented for on-chip monitoring. This thesis demonstrates that these techniques catch errors which are undetected by traditional verification and validation tools. The locations of faults are specified and errors are caught earlier in the design flow, which saves time by reducing synthesis iterations

Development of a reconfigurable assembly system with enhanced control capabilities and virtual commissioning

Thesis (M. Tech. (Engineering: Electrical)) -- Central University of technology, Free State, 2013The South African (SA) manufacturing industry requires developing similar levels of sophistication and expertise in automation as its international rivals to compete for global markets. To achieve this, manufacturing plants need to be managed extremely efficiently to ensure the quality of manufactured products and these plants must also have the relevant infrastructure. Furthermore, this industry must also compensate for rapid product introduction, product changes and short product lifespan. To support this need, this industry must engage in the current trend in automation known as reconfigurable manufacturing. The aim of the study is to develop a reconfigurable assembly system with enhanced control capabilities by utilizing virtual commissioning. In addition, this system must be capable of assembling multiple different products of a product range; reconfigure to accommodate the requirements of these products; autonomously reroute the product flow and distribute workload among assembly cells; handle erroneous products; and implement enhanced control methods. To achieve this, a literature study was done to confirm the type of components to be used, reveal design issues and what characteristics such a system must adhere to. Software named DELMIA was used to create a virtual simulation environment to verify the system and simultaneously scrutinize the methods of verification. On completion, simulations were conducted to verify software functions, device movements and operations, and the control software of the system. Based on simulation results, the physical system was built, and then verified with a multi agent system as overhead control to validate the entire system. The final results showed that the project objectives are achievable and it was also found that DELMIA is an excellent tool for system verification and will expedite the design of a system. By obtaining these results it is indicated that companies can design and verify their systems earlier through virtual commissioning. In addition, their systems will be more flexible, new products or product changes can be introduced more frequently, with minimum cost and downtime. This will enable SA manufacturing companies to be more competitive, ensure increased productivity, save time and so ensure them an advantage over their international competition

Space Flight LiDARs, Navigation & Science Instrument Implementations: Lasers, Optoelectronics, Integrated Photonics, Fiber Optic Subsystems and Components

For the past 25 years, the National Aeronautics and Space Administration (NASA) Goddard Space Flight Center's Photonics Group in the Engineering Directorate has been substantially contributing to the flight design, development, production, testing and integration of many science and navigational instruments. The Moon to Mars initiative will rely heavily upon utilizing commercial technologies for instrumentation with aggressive schedule deadlines. The group has an extensive background in screening, qualifying, development and integration of commercial components for spaceflight applications. By remaining adaptable and employing a rigorous approach to component and instrument development, they have forged and fostered relationships with industry partners. They have been willing to communicate lessons learned in packaging, part construction, materials selection, testing, and other facets of the design and production process critical to implementation for high-reliability systems. As a result, this successful collaboration with industry vendors and component suppliers has enabled a history of mission success from the Moon to Mars (and beyond) while balancing cost, schedule, and risk postures. In cases where no commercial components exist, the group works closely with other teams at Goddard Space Flight Center and other NASA field centers to fabricate and produce flight hardware for science, remote sensing, and navigation applications. Summarized here is the last ten years of instrumentation development lessons learned and data collected from the subsystems down to the optoelectronic component level