Software-Defined Radio Demonstrators: An Example and Future Trends

Software-defined radio requires the combination of software-based signal processing and the enabling hardware components. In this paper, we present an overview of the criteria for such platforms and the current state of development and future trends in this area. This paper will also provide details of a high-performance flexible radio platform called the maynooth adaptable radio system (MARS) that was developed to explore the use of software-defined radio concepts in the provision of infrastructure elements in a telecommunications application, such as mobile phone basestations or multimedia broadcasters

ワイヤレス通信のための先進的な信号処理技術を用いた非線形補償法の研究

The inherit nonlinearity in analogue front-ends of transmitters and receivers have had primary impact on the overall performance of the wireless communication systems, as it gives arise of substantial distortion when transmitting and processing signals with such circuits. Therefore, the nonlinear compensation (linearization) techniques become essential to suppress the distortion to an acceptable extent in order to ensure sufficient low bit error rate. Furthermore, the increasing demands on higher data rate and ubiquitous interoperability between various multi-coverage protocols are two of the most important features of the contemporary communication system. The former demand pushes the communication system to use wider bandwidth and the latter one brings up severe coexistence problems. Having fully considered the problems raised above, the work in this Ph.D. thesis carries out extensive researches on the nonlinear compensations utilizing advanced digital signal processing techniques. The motivation behind this is to push more processing tasks to the digital domain, as it can potentially cut down the bill of materials (BOM) costs paid for the off-chip devices and reduce practical implementation difficulties. The work here is carried out using three approaches: numerical analysis & computer simulations; experimental tests using commercial instruments; actual implementation with FPGA. The primary contributions for this thesis are summarized as the following three points: 1) An adaptive digital predistortion (DPD) with fast convergence rate and low complexity for multi-carrier GSM system is presented. Albeit a legacy system, the GSM, however, has a very strict requirement on the out-of-band emission, thus it represents a much more difficult hurdle for DPD application. It is successfully implemented in an FPGA without using any other auxiliary processor. A simplified multiplier-free NLMS algorithm, especially suitable for FPGA implementation, for fast adapting the LUT is proposed. Many design methodologies and practical implementation issues are discussed in details. Experimental results have shown that the DPD performed robustly when it is involved in the multichannel transmitter. 2) The next generation system (5G) will unquestionably use wider bandwidth to support higher throughput, which poses stringent needs for using high-speed data converters. Herein the analog-to-digital converter (ADC) tends to be the most expensive single device in the whole transmitter/receiver systems. Therefore, conventional DPD utilizing high-speed ADC becomes unaffordable, especially for small base stations (micro, pico and femto). A digital predistortion technique utilizing spectral extrapolation is proposed in this thesis, wherein with band-limited feedback signal, the requirement on ADC speed can be significantly released. Experimental results have validated the feasibility of the proposed technique for coping with band-limited feedback signal. It has been shown that adequate linearization performance can be achieved even if the acquisition bandwidth is less than the original signal bandwidth. The experimental results obtained by using LTE-Advanced signal of 320 MHz bandwidth are quite satisfactory, and to the authors’ knowledge, this is the first high-performance wideband DPD ever been reported. 3) To address the predicament that mobile operators do not have enough contiguous usable bandwidth, carrier aggregation (CA) technique is developed and imported into 4G LTE-Advanced. This pushes the utilization of concurrent dual-band transmitter/receiver, which reduces the hardware expense by using a single front-end. Compensation techniques for the respective concurrent dual-band transmitter and receiver front-ends are proposed to combat the inter-band modulation distortion, and simultaneously reduce the distortion for the both lower-side band and upper-side band signals.電気通信大学201

Study on wideband voltage controlled oscillator and high efficiency power amplifier ICs for wireless communications

制度:新 ; 報告番号:甲3604号 ; 学位の種類:博士(工学) ; 授与年月日:2012/2/20 ; 早大学位記番号:新595

A fully integrated 24-GHz phased-array transmitter in CMOS

This paper presents the first fully integrated 24-GHz phased-array transmitter designed using 0.18-/spl mu/m CMOS transistors. The four-element array includes four on-chip CMOS power amplifiers, with outputs matched to 50 /spl Omega/, that are each capable of generating up to 14.5 dBm of output power at 24 GHz. The heterodyne transmitter has a two-step quadrature up-conversion architecture with local oscillator (LO) frequencies of 4.8 and 19.2 GHz, which are generated by an on-chip frequency synthesizer. Four-bit LO path phase shifting is implemented in each element at 19.2 GHz, and the transmitter achieves a peak-to-null ratio of 23 dB with raw beam-steering resolution of 7/spl deg/ for radiation normal to the array. The transmitter can support data rates of 500 Mb/s on each channel (with BPSK modulation) and occupies 6.8 mm /spl times/ 2.1 mm of die area

Techniques for Frequency Synthesizer-Based Transmitters.

Internet of Things (IoT) devices are poised to be the largest market for the semiconductor industry. At the heart of a wireless IoT module is the radio and integral to any radio is the transmitter. Transmitters with low power consumption and small area are crucial to the ubiquity of IoT devices. The fairly simple modulation schemes used in IoT systems makes frequency synthesizer-based (also known as PLL-based) transmitters an ideal candidate for these devices. Because of the reduced number of analog blocks and the simple architecture, PLL-based transmitters lend themselves nicely to the highly integrated, low voltage nanometer digital CMOS processes of today. This thesis outlines techniques that not only reduce the power consumption and area, but also significantly improve the performance of PLL-based transmitters.PhDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/113385/1/mammad_1.pd

INTERFERENCE MANAGEMENT IN LTE SYSTEM AND BEYOUND

The key challenges to high throughput in cellular wireless communication system are interference, mobility and bandwidth limitation. Mobility has never been a problem until recently, bandwidth has been constantly improved upon through the evolutions in cellular wireless communication system but interference has been a constant limitation to any improvement that may have resulted from such evolution. The fundamental challenge to a system designer or a researcher is how to achieve high data rate in motion (high speed) in a cellular system that is intrinsically interference-limited. Multi-antenna is the solution to data on the move and the capacity of multi-antenna system has been demonstrated to increase proportionally with increase in the number of antennas at both transmitter and receiver for point-to-point communications and multi-user environment. However, the capacity gain in both uplink and downlink is limited in a multi-user environment like cellular system by interference, the number of antennas at the base station, complexity and space constraint particularly for a mobile terminal. This challenge in the downlink provided the motivation to investigate successive interference cancellation (SIC) as an interference management tool LTE system and beyond. The Simulation revealed that ordered successive interference (OSIC) out performs non-ordered successive interference cancellation (NSIC) and the additional complexity is justified based on the associated gain in BER performance of OSIC. The major drawback of OSIC is that it is not efficient in network environment employing power control or power allocation. Additional interference management techniques will be required to fully manage the interference.fi=Opinnäytetyö kokotekstinä PDF-muodossa.|en=Thesis fulltext in PDF format.|sv=Lärdomsprov tillgängligt som fulltext i PDF-format

Study of continuous-phase four-state modulation for cordless telecommunications. Assessment by simulation of CP-QFSK as an alternative modulation scheme for TDMA digital cordless telecommunications systems operating in indoor applications

One of the major driving elements behind the explosive boom in wireless revolution is the advances in the field of modulation which plays a fundamental role in any communication system, and especially in cellular radio systems. Hence, the elaborate choice of an efficient modulation scheme is of paramount importance in the design and employment of any communications system. Work presented in this thesis is an investigation (study) of the feasibility of whether multilevel FSK modulation scheme would provide a viable alternative modem that can be employed in TDMA cordless communications systems. In the thesis the design and performance analysis of a non-coherent multi-level modem that offers a great deal of bandwidth efficiency and hardware simplicity is studied in detail. Simulation results demonstrate that 2RC pre-modulation filter pulse shaping with a modulation index of 0.3, and pre-detection filter normalized equivalent noise bandwidth of 1.5 are optimum system parameter values. Results reported in chapter 5 signify that an adjacent channel rejection factor of around 40 dB has been achieved at channel spacing of 1.5 times the symbol rate while the DECT system standards stipulated a much lower rejection limit criterion (25-30dB), implying that CP-QFSK modulation out-performs the conventional GMSK as it causes significantly less ACI, thus it is more spectrally efficient in a multi-channel system. However, measured system performance in terms of BER indicates that this system does not coexist well with other interferers as at delay spreads between 100ns to 200ns, which are commonly encountered in such indoor environment, a severe degradation in system performance apparently caused by multi-path fading has been noticed, and there exists a noise floor of about 40 dB, i.e. high irreducible error rate of less than 5.10-3. Implementing MRC diversity combiner and BCH codec has brought in a good gain.Higher Education Ministr