Carbon footprint of 3D-printed bone tissue engineering scaffolds: an life cycle assessment study

The bone tissue engineering scaffolds is one of the methods for repairing bone defects caused by various factors. According to modern tissue engineering technology, three-dimensional (3D) printing technology for bone tissue engineering provides a temporary basis for the creation of biological replacements. Through the generated 3D bone tissue engineering scaffolds from previous studies, the assessment to evaluate the environmental impact has shown less attention in research. Therefore, this paper is aimed to propose the Model of life cycle assessment (LCA) for 3D bone tissue engineering scaffolds of 3D gel-printing technology and presented the analysis technique of LCA from cradle-to-gate for assessing the environmental impacts of carbon footprint. Acrylamide (C3H5NO), citric acid (C6H8O7), N,N-Dimethylaminopropyl acrylamide (C8H16N2O), deionized water (H2O), and 2-Hydroxyethyl acrylate (C5H8O3) was selected as the material resources. Meanwhile, the 3D gel-printing technology was used as the manufacturing processes in the system boundary. The analysis is based on the LCA Model through the application of GaBi software. The environmental impact was assessed in the 3D gel-printing technology and it was obtained that the system shows the environmental impact of global warming potential (GWP). All of the emissions contributed to GWP have been identified such as emissions to air, freshwater, seawater, and industrial soil. The aggregation of GWP result in the stage of manufacturing process for input and output data contributed 47.6% and 32.5% respectively. Hence, the data analysis of the results is expected to use for improving the performance at the material and manufacturing process of the product life cycle

Towards fully integrated CMOS RF receivers

The evolution of the mobile telephony is demanding new multi-function terminals (cellular and cordless phones, GPS, pagers) compatible with a variety of standard (GSM, DCS, DECT, CDMA). At the same time the reduction of cost, size and power dissipation is mandatory. All this requires an higher integration level for the RF part, that is presently using a big number of components. This explains the big research effort put in silicon RF circuits particularly in CMOS technology. In this paper the state of the art of CMOS RF circuits is outlined. In particular some results regarding critical building blocks obtained by the STMicroelectronics and Pavia University research team are given. Future evelopments and the progress needed to successfully implement them are also pointed out

Design and Optimization of a Low DC Offset in Implanted System for ENG Recording Based on Velocity Selectivity Method

The major target of this paper is the design of advance signal processing system based on minimized length of bits required for digital-to-analogy converter (DAC) for velocity selectivity recording (VSR) approach. The main application of this device is peripheral nerves recording (electroneurogram-ENG) by exploring a spectral analysis for the propagation of neural activities in the velocity domain recording using VSR in implantable application. This research adapted a flexible, compact, andnbspenergynbspefficient dc offset removal circuit. An optimization design has been used based on best possible process involving linearity and area is thus suggested. The system process acquired using this approach were characterized as having a 10-bit signal processing for DAC resolution, with 1.4 mA rms output current, with minimum size around 0.02 mm2nbspof chip area, using FPGA board as prototype design. This paper also explores the design temperature vibration in online recording minimization the output DC offset decrease the heat emission which is significantly for long term implementation applications. This study proposed an analysis circuit configuration demonstrate that this approach could achieve a small DC offset error, with small size required