Design of FIR digital filters with prescribed flatness and peak error constraints using second-order cone programming

This paper studies the design of digital finite impulse response (FIR) filters with prescribed flatness and peak design error constraints using second-order cone programming (SOCP). SOCP is a powerful convex optimization method, where linear and convex quadratic inequality constraints can readily be incorporated. It is utilized in this study for the optimal minimax and least squares design of linear-phase and low-delay (LD) FIR filters with prescribed magnitude flatness and peak design error. The proposed approach offers more flexibility than traditional maximally-flat approach for the tradeoff between the approximation error and the degree of design freedom. Using these results, new LD specialized filters such as digital differentiators, Hilbert Transformers, Mth band filters and variable digital filters with prescribed magnitude flatness constraints can also be derived. © 2005 IEEE.published_or_final_versio

The design of digital all-pass filters using second-order cone programming (SOCP)

This brief proposes a new method for designing digital all-pass filters with a minimax design criterion using second-order cone programming (SOCP). Unlike other all-pass filter design methods, additional linear constraints can be readily incorporated. The overall design problem can be solved through a series of linear programming subproblems and the bisection search algorithm. The convergence of the algorithm is guaranteed. Nonlinear constraints such as the pole radius constraint of the filters can be formulated as additional SOCP constraints using Rouche's theorem. It was found that the pole radius constraint allows an additional tradeoff between the approximation error and the stability margin. The effectiveness of the proposed method is demonstrated by several design examples and comparison with conventional methods. © 2005 IEEE.published_or_final_versio

A new method for designing causal stable IIR variable fractional delay digital filters

This paper studies the design of causal stable Farrow-based infinite-impulse response (IIR) variable fractional delay digital filters (VFDDFs), whose subfilters have a common denominator. This structure has the advantages of reduced implementation complexity and avoiding undesirable transient response when tuning the spectral parameter in the Farrow structure. The design of such IIR VFDDFs is based on a new model reduction technique which is able to incorporate prescribed flatness and peak error constraints to the IIR VFDDF under the second order cone programming framework. Design example is given to demonstrate the effectiveness of the proposed approach. © 2007 IEEE.published_or_final_versio

Design and multiplierless realization of digital synthesis filters for hybrid-filter-bank A/D converters

This paper studies the optimal least squares and minimax design and realization of digital synthesis filters for hybrid-filter-bank analog-to-digltal converters (HFB ADCs) to meet a given spurious-free dynamic range (SFDR). The problem for designing finite-impulse-response synthesis filters is formulated as a second-order cone-programming problem, which is convex and allows linear and quadratic constraints such as peak aliasing error to be incorporated. The fixed coefficients of the designed synthesis filters are efficiently implemented using sum-of-power-of-two (SOPOT) coefficients, while the internal word length used for each intermediate data is minimized using geometric programming. The main sources of error are analyzed, and a new formula of SFDR in terms of these errors is derived. The effects of component variations of analog analysis filters on the HFB ADC are also addressed by means of two new robust HFB ADC design algorithms based on stochastic uncertainty and worst case uncertainty models. Design results show that the proposed approach offers more flexibility and better performance than conventional methods in achieving a given SFDR and that the robust design algorithms are more robust to parameter uncertainties than the nominal design in which the uncertainties are not taken into account. © 2009 IEEE.published_or_final_versio

Design of multi-plet perfect reconstruction filter banks using frequency-response masking technique

This paper proposes a new design method for a class of two-channel perfect reconstruction (PR) filter banks (FBs) called multi-plet FBs with very sharp cutoff using frequency- response masking (FRM) technique. The multi-plet FBs are PR FBs and their frequency characteristics are controlled by a single subfilter. By recognizing the close relationship between the subfilter and the FRM-based halfband filter, very sharp cutoff PR multi-plet FBs can be realized with reduced implementation complexity. The design procedure is very general and it can be applied to both linear-phase and low-delay PR FBs. Design examples are given to demonstrate the usefulness of the proposed method. © 2008 IEEE.published_or_final_versio

Computer-Aided Design of Switched-Capacitor Filters

This thesis describes a series of computer methods for the design of switched-capacitor filters. Current software is greatly restricted in the types of transfer function that can be designed and in the range of filter structures by which they can be implemented. To solve the former problem, several new filter approximation algorithms are derived from Newton's method, yielding the Remez algortithm as a special case (confirming its convergency properties). Amplitude responses with arbitrary passband shaping and stopband notch positions are computed. Points of a specified degree of tangency to attenuation boundaries (touch points) can be placed in the response, whereby a family of transfer functions between Butterworth and elliptic can be derived, offering a continuous trade-off in group delay and passive sensitivity properties. The approximation algorithms have also been applied to arbitrary group delay correction by all-pass functions. Touch points form a direct link to an iterative passive ladder design method, which bypasses the need for Hurwitz factorisation. The combination of iterative and classical synthesis methods is suggested as the best compromise between accuracy and speed. It is shown that passive ladder prototypes of a minimum-node form can be efficiently simulated by SC networks without additional op-amps. A special technique is introduced for canonic realisation of SC ladder networks from transfer functions with finite transmission at high frequency, solving instability and synthesis difficulties. SC ladder structures are further simplified by synthesising the zeros at +/-2fs which are introduced into the transfer function by bilinear transformation. They cause cancellation of feedthrough branches and yield simplified LDI-type SC filter structures, although based solely on the bilinear transform. Matrix methods are used to design the SC filter simulations. They are shown to be a very convenient and flexible vehicle for computer processing of the linear equations involved in analogue filter design. A wide variety of filter structures can be expressed in a unified form. Scaling and analysis can readily be performed on the system matrices with great efficiency. Finally, the techniques are assembled in a filter compiler for SC filters called PANDDA. The application of the above techniques to practical design problems is then examined. Exact correction of sinc(x), LDI termination error, pre-filter and local loop telephone line weightings are illustrated. An optimisation algorithm is described, which uses the arbitrary passband weighting to predistort the transfer function for response distortions. Compensation of finite amplifier gain-bandwidth and switch resistance effects in SC filters is demonstrated. Two commercial filter specifications which pose major difficulties for traditional design methods are chosen as examples to illustrate PANDDA's full capabilities. Significant reductions in order and total area are achieved. Finally, test results of several SC filters designed using PANDDA for a dual-channel speech-processing ASIC are presented. The speed with which high-quality, standard SC filters can be produced is thus proven

Variable Fractional Delay FIR Filter Design with a Bicriteria and Coefficient Relationship

This brief investigates a tradeoff between the integral squared error and the peak deviation error for a variable fractional delay (VFD) filter with a coefficient relationship. The integral squared error is minimized subject to additional constraints on the peak deviation error. The problem is solved by utilizing second-order cone programming. In addition, the performance of the VFD filter with discrete coefficients is investigated, in which the filter coefficients are expressed as the sum of power-of-two terms to reduce the filter operations to shifts and adds. Design examples show that the peak deviation error can be significantly reduced from the least squares solution while maintaining approximately the same integral squared error. Similarly, the integral squared error can be significantly reduced from the minimax solution while maintaining approximately the same peak deviation error. Furthermore, the tradeoff filters are less sensitive with respect to quantization than the least squares and minimax solutions

The design and multiplier-less realization of software radio receivers with reduced system delay

This paper studies the design and multiplier-less realization of a new software radio receiver (SRR) with reduced system delay. It employs low-delay finite-impulse response (FIR) and digital allpass filters to effectively reduce the system delay of the multistage decimators in SRRs. The optimal least-square and minimax designs of these low-delay FIR and allpass-based filters are formulated as a semidefinite programming (SDP) problem, which allows zero magnitude constraint at ω = π to be incorporated readily as additional linear matrix inequalities (LMIs). By implementing the sampling rate converter (SRC) using a variable digital filter (VDF) immediately after the integer decimators, the needs for an expensive programmable FIR filter in the traditional SRR is avoided. A new method for the optimal minimax design of this VDF-based SRC using SDP is also proposed and compared with traditional weight least squares method. Other implementation issues including the multiplier-less and digital signal processor (DSP) realizations of the SRR and the generation of the clock signal in the SRC are also studied. Design results show that the system delay and implementation complexities (especially in terms of high-speed variable multipliers) of the proposed architecture are considerably reduced as compared with conventional approaches. © 2004 IEEE.published_or_final_versio

Attitude transfer assembly design for MAGSAT

A description is given of a design for an instrument system that will monitor the orientation of a boom-mounted vector magnetometer relative to the main spacecraft body. The attitude of the magnetometer is measured with respect to X and Z axes lateral to the boom length and also a twist axis around the boom center line. These measurements are made in a noncontact optical approach employing a three-axis autocollimator system mounted on the main body of the spacecraft with only passive elements (reflectors) located at the end of the 20-foot boom