643 research outputs found

    AN EFFECTIVE APPROACH OF BILATERAL FILTER IMPLEMENTATION IN SPARTAN-3 FIELD PROGRAMMABLE GATE ARRAY

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    This paper presents the Field Programmable Gate Array (FPGA) implementation of Bilateral Filter, in order to achieve high performance and low power consumption. Bilateral filtering is a technique to smooth images while preserving edges by means of a nonlinear combination of nearby image values. This method is nonlinear, local, and simple. We give an idea that bilateral filtering can be accelerated by bilateral grid scheme that enables fast edge-aware image processing. Nowadays, most of the applications require real time hardware systems with large computing potentiality for which fast and dedicated Very Large Scale Integration (VLSI) architecture appears to be the best possible solution. While it ensures high resource utilization, that too in cost effective platforms like FPGA, designing such architecture does offers some flexibilities like speeding up the computation by adapting more pipelined structures and parallel processing possibilities of reduced memory consumptions. Here we have developed an effective approach of bilateral filter implementation in Spartan-3 FPGA

    GENETIC FUZZY FILTER BASED ON MAD AND ROAD TO REMOVE MIXED IMPULSE NOISE

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    In this thesis, a genetic fuzzy image filtering based on rank-ordered absolute differences (ROAD) and median of the absolute deviations from the median (MAD) is proposed. The proposed method consists of three components, including fuzzy noise detection system, fuzzy switching scheme filtering, and fuzzy parameters optimization using genetic algorithms (GA) to perform efficient and effective noise removal. Our idea is to utilize MAD and ROAD as measures of noise probability of a pixel. Fuzzy inference system is used to justify the degree of which a pixel can be categorized as noisy. Based on the fuzzy inference result, the fuzzy switching scheme that adopts median filter as the main estimator is applied to the filtering. The GA training aims to find the best parameters for the fuzzy sets in the fuzzy noise detection. From the experimental results, the proposed method has successfully removed mixed impulse noise in low to medium probabilities, while keeping the uncorrupted pixels less affected by the median filtering. It also surpasses the other methods, either classical or soft computing-based approaches to impulse noise removal, in MAE and PSNR evaluations. It can also remove salt-and-pepper and uniform impulse noise well

    Multi-type Noise Removal in Lead Frame Image Using Enhanced Hybrid Median Filter

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    Image filtering technique plays a very important role in digital image processing. It is one of the major steps in image enhancement and restoration. This filtering technique can remove noise and preserve the details of the image for feature extraction processes. However, filtering process can still be considered as a huge challenge for image filtering technique. Common noises in the image such as Salt & Pepper, Gaussian, Speckle, and Poisson Noise are still posing problems in filtering process where the quality and the originality of the images can be degraded and disturbed. Meanwhile, a single filtering technique is usually fit to deal with only certain specific noise. This paper presents an enhanced Hybrid Median Filter (H6F) technique to improve image filtering process. The technique involves 3x3 sub-mask and determination of new pixel value from the median value of the three steps which are the median calculation of ‘+’-neighbours, median calculation of all sub-masks and selection of centre pixel value. The H6F technique has been computed on lead frame inspection system. The results have shown that the technique has been able to remove multi-type of noises efficiently and produce exceptionally low Mean-Square Error (MSE) while consuming the acceptable amount of execution time when compared to other filtering techniques

    Digital image processing for noise reduction in medical ultrasonics

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    An Improved Fault Tolerant Technique of Median Filter

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    Acquisition noises in the digital image processing system basically made out of imprudent clamors, for example, hot and dead pixels, and for the most part expelled utilizing middle channels. The median filtering algorithm can be speedup by FPGA implementation. Configuration memory cells in SRAM based FPGAs are susceptible to radiation effects such as SEUs which leads to configuration memory bit flips and hence a protective measure is required for the proper operation of median filtering algorithm.The fault tolerant implementations of median filter provides a range for median value with which the calculated median value is checked and find out error if the median is out of the provided range. The main aim of the project is to fasten up the fault tolerant implementation of median filter in FPGAs by adding a few resources. Experimental results show that the proposed technique significantly reduces the latency of the fault tolerant median filtering process

    Development of Some Novel Nonlinear and Adaptive Digital Image Filters for Efficient Noise Suppression

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    Some nonlinear and adaptive digital image filtering algorithms have been developed in this thesis to suppress additive white Gaussian noise (AWGN), bipolar fixed-valued impulse, also called salt and pepper noise (SPN), random-valued impulse noise (RVIN) and their combinations quite effectively. The present state-of-art technology offers high quality sensors, cameras, electronic circuitry: application specific integrated circuits (ASIC), system on chip (SOC), etc., and high quality communication channels. Therefore, the noise level in images has been reduced drastically. In literature, many efficient nonlinear image filters are found that perform well under high noise conditions. But their performance is not so good under low noise conditions as compared to the extremely high computational complexity involved therein. Thus, it is felt that there is sufficient scope to investigate and develop quite efficient but simple algorithms to suppress low-power noise in an image. When..

    Efficient Real-Time Architectures and FPGA Implementations of Histogram-Based Median Filters for High Definition Videos

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    Digital filtering plays an important role in many signal processing applications. Filtering is performed to recover the original signal from its corrupted version. Median filter is a non-linear digital filter that replaces a sample in a given window by the median value of the samples in the window. For images corrupted with impulse noise, median filter provides a very high quality of filtered images. Several modifications of median filters have been proposed and implemented to achieve high image quality compared to that provided by conventional median filters. When these filters are implemented on hardware platforms such as FPGAs, the performance parameters, namely, the area, power and operating frequency should be taken into consideration in addition to the quality of the filtered image. Therefore, efficient implementation of median filters on FPGAs for image and video processing algorithms has been a topic of much interest. The existing hardware-based median filters for high definition video formats do not always satisfy the real-time throughput requirements or are inefficient with respect to hardware performance parameters, such as the area and frequency. This is due to the fact that most of the existing techniques use sorting-based median calculation, which results in a low hardware performance. In this thesis, architectures that use histogram-based median computation, which is a non-sorting-based operation, are designed with a view of efficient hardware implementation. This is carried out in two parts. We design and implement efficient architectures that satisfy the real-time throughput requirements of full high definition (FHD) videos in the first part and that of ultra high definition (UHD) videos in the second part. In the first part, an efficient real-time histogram-based median filter that uses the concept of bit-plane-slicing and adaptive switching median filter (ASMF) is designed and implemented on FPGAs. We term this architecture as hybrid architecture for median filtering (HAMF). The proposed HAMF computes an approximate median, since it uses only the most significant B-bits of the pixel values for median calculation. As a result, the algorithmic level implementation of the proposed HAMF results in a slight degradation in the filtered image quality compared to that provided by ASMF. The proposed HAMF provides a significant improvement over ASMF in terms of the area and operating frequency, when implemented on different generation FPGAs. Analysis of the different parameters, such as the number of bit-planes used in the computation of the median and the number of pipelining stages, is carried out to study the trade-off between the quality of the filtered image and hardware performance. Although the FPGA implementation of the proposed HAMF provides a very high operating frequency, the quality of the images filtered by its algorithmic level implementation decreases with increasing window size and noise density. This filter may be suitable for applications that require FHD filtering with cost constraints, but not for applications where the output image quality is as important as the hardware performance. Hence, in the second part, we design an efficient and real-time architecture of the hierarchical histogram-based median filter (HHMF). The proposed architecture is designed using a full synchronous pipeline, a synchronous accumulate-and-compare unit, and is scalable. The FPGA implementation of the proposed architecture of HHMF can perform real-time filtering of 4K and 8K UHD videos. The quality of the image filtered by HHMF is not compromised as in the case of HAMF, since HHMF uses all the bit-planes and computes the actual median. Although the FPGA implementation of HHMF results in more area utilization, the proposed implementation is more economical than a GPU-based HHMF implementation and provides a better throughput

    GENETIC FUZZY FILTER BASED ON MAD AND ROAD TO REMOVE MIXED IMPULSE NOISE

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    In this thesis, a genetic fuzzy image filtering based on rank-ordered absolute differences (ROAD) and median of the absolute deviations from the median (MAD) is proposed. The proposed method consists of three components, including fuzzy noise detection system, fuzzy switching scheme filtering, and fuzzy parameters optimization using genetic algorithms (GA) to perform efficient and effective noise removal. Our idea is to utilize MAD and ROAD as measures of noise probability of a pixel. Fuzzy inference system is used to justify the degree of which a pixel can be categorized as noisy. Based on the fuzzy inference result, the fuzzy switching scheme that adopts median filter as the main estimator is applied to the filtering. The GA training aims to find the best parameters for the fuzzy sets in the fuzzy noise detection. From the experimental results, the proposed method has successfully removed mixed impulse noise in low to medium probabilities, while keeping the uncorrupted pixels less affected by the median filtering. It also surpasses the other methods, either classical or soft computing-based approaches to impulse noise removal, in MAE and PSNR evaluations. It can also remove salt-and-pepper and uniform impulse noise well
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