24 research outputs found

    Simplifying Internet of Things (IoT) Data Processing Work ow Composition and Orchestration in Edge and Cloud Datacenters

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    Ph. D. Thesis.Internet of Things (IoT) allows the creation of virtually in nite connections into a global array of distributed intelligence. Identifying a suitable con guration of devices, software and infrastructures in the context of user requirements are fundamental to the success of delivering IoT applications. However, the design, development, and deployment of IoT applications are complex and complicated due to various unwarranted challenges. For instance, addressing the IoT application users' subjective and objective opinions with IoT work ow instances remains a challenge for the design of a more holistic approach. Moreover, the complexity of IoT applications increased exponentially due to the heterogeneous nature of the Edge/Cloud services, utilised to lower latency in data transformation and increase reusability. To address the composition and orchestration of IoT applications in the cloud and edge environments, this thesis presents IoT-CANE (Context Aware Recommendation System) as a high-level uni ed IoT resource con guration recommendation system which embodies a uni ed conceptual model capturing con guration, constraint and infrastructure features of Edge/Cloud together with IoT devices. Second, I present an IoT work ow composition system (IoTWC) to allow IoT users to pipeline their work ows with proposed IoT work ow activity abstract patterns. IoTWC leverages the analytic hierarchy process (AHP) to compose the multi-level IoT work ow that satis es the requirements of any IoT application. Besides, the users are be tted with recommended IoT work ow con gurations using an AHP based multi-level composition framework. The proposed IoTWC is validated on a user case study to evaluate the coverage of IoT work ow activity abstract patterns and a real-world scenario for smart buildings. Last, I propose a fault-tolerant automation deployment IoT framework which captures the IoT work ow plan from IoTWC to deploy in multi-cloud edge environment with a fault-tolerance mechanism. The e ciency and e ectiveness of the proposed fault-tolerant system are evaluated in a real-time water ooding data monitoring and management applicatio

    Digital-based analog processing in nanoscale CMOS ICs for IoT applications

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    The Internet-of-Things (IoT) concept has been opening up a variety of applications, such as urban and environmental monitoring, smart health, surveillance, and home automation. Most of these IoT applications require more and more power/area efficient Complemen tary Metal–Oxide–Semiconductor (CMOS) systems and faster prototypes (lower time-to market), demanding special modifications in the current IoT design system bottleneck: the analog/RF interfaces. Specially after the 2000s, it is evident that there have been significant improvements in CMOS digital circuits when compared to analog building blocks. Digital circuits have been taking advantage of CMOS technology scaling in terms of speed, power consump tion, and cost, while the techniques running behind the analog signal processing are still lagging. To decrease this historical gap, there has been an increasing trend in finding alternative IC design strategies to implement typical analog functions exploiting Digital in-Concept Design Methodologies (DCDM). This idea of re-thinking analog functions in digital terms has shown that Analog ICs blocks can also avail of the feature-size shrinking and energy efficiency of new technologies. This thesis deals with the development of DCDM, demonstrating its compatibility for Ultra-Low-Voltage (ULV) and Power (ULP) IoT applications. This work proves this state ment through the proposing of new digital-based analog blocks, such as an Operational Transconductance Amplifiers (OTAs) and an ac-coupled Bio-signal Amplifier (BioAmp). As an initial contribution, for the first time, a silicon demonstration of an embryonic Digital-Based OTA (DB-OTA) published in 2013 is exhibited. The fabricated DB-OTA test chip occupies a compact area of 1,426 µm2 , operating at supply voltages (VDD) down to 300 mV, consuming only 590 pW while driving a capacitive load of 80pF. With a Total Harmonic Distortion (THD) lower than 5% for a 100mV input signal swing, its measured small-signal figure of merit (FOMS) and large-signal figure of merit (FOML) are 2,101 V −1 and 1,070, respectively. To the best of this thesis author’s knowledge, this measured power is the lowest reported to date in OTA literature, and its figures of merit are the best in sub-500mV OTAs reported to date. As the second step, mainly due to the robustness limitation of previous DB-OTA, a novel calibration-free digital-based topology is proposed, named here as Digital OTA (DIG OTA). A 180-nm DIGOTA test chip is also developed exhibiting an area below the 1000 µm2 wall, 2.4nW power under 150pF load, and a minimum VDD of 0.25 V. The proposed DIGOTA is more digital-like compared with DB-OTA since no pseudo-resistor is needed. As the last contribution, the previously proposed DIGOTA is then used as a building block to demonstrate the operation principle of power-efficient ULV and ultra-low area (ULA) fully-differential, digital-based Operational Transconductance Amplifier (OTA), suitable for microscale biosensing applications (BioDIGOTA) such as extreme low area Body Dust. Measured results in 180nm CMOS confirm that the proposed BioDIGOTA can work with a supply voltage down to 400 mV, consuming only 95 nW. The BioDIGOTA layout occupies only 0.022 mm2 of total silicon area, lowering the area by 3.22X times compared to the current state of the art while keeping reasonable system performance, such as 7.6 Noise Efficiency Factor (NEF) with 1.25 µVRMS input-referred noise over a 10 Hz bandwidth, 1.8% of THD, 62 dB of the common-mode rejection ratio (CMRR) and 55 dB of power supply rejection ratio (PSRR). After reviewing the current DCDM trend and all proposed silicon demonstrations, the thesis concludes that, despite the current analog design strategies involved during the analog block development

    Digital twins: a survey on enabling technologies, challenges, trends and future prospects

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    Digital Twin (DT) is an emerging technology surrounded by many promises, and potentials to reshape the future of industries and society overall. A DT is a system-of-systems which goes far beyond the traditional computer-based simulations and analysis. It is a replication of all the elements, processes, dynamics, and firmware of a physical system into a digital counterpart. The two systems (physical and digital) exist side by side, sharing all the inputs and operations using real-time data communications and information transfer. With the incorporation of Internet of Things (IoT), Artificial Intelligence (AI), 3D models, next generation mobile communications (5G/6G), Augmented Reality (AR), Virtual Reality (VR), distributed computing, Transfer Learning (TL), and electronic sensors, the digital/virtual counterpart of the real-world system is able to provide seamless monitoring, analysis, evaluation and predictions. The DT offers a platform for the testing and analysing of complex systems, which would be impossible in traditional simulations and modular evaluations. However, the development of this technology faces many challenges including the complexities in effective communication and data accumulation, data unavailability to train Machine Learning (ML) models, lack of processing power to support high fidelity twins, the high need for interdisciplinary collaboration, and the absence of standardized development methodologies and validation measures. Being in the early stages of development, DTs lack sufficient documentation. In this context, this survey paper aims to cover the important aspects in realization of the technology. The key enabling technologies, challenges and prospects of DTs are highlighted. The paper provides a deep insight into the technology, lists design goals and objectives, highlights design challenges and limitations across industries, discusses research and commercial developments, provides its applications and use cases, offers case studies in industry, infrastructure and healthcare, lists main service providers and stakeholders, and covers developments to date, as well as viable research dimensions for future developments in DTs

    Exploiting PHY for improving LoRa based communication and localisation system

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    LoRa is an emerging technology of low-power wide-area networks (LPWANs) operating on industrial, scientific and medical (ISM) bands to provide connectivity for Internet of Thing (IoT) devices. As the number of devices increases, the network suffers from scalability issues. Therefore, we design a cloud radio access network (C-RAN or Cloud-RAN) with multiple LoRa gateways to solve this problem. Furthermore, we develop novel algorithms to provide accurate localisation for LoRa devices. This thesis makes three new contributions to LoRa based communication and localisation system as follows. The first contribution is a compressive sensing-based algorithm to reduce the uplink bit rate between the gateways and the cloud server. The proposed novel compression algorithm can reduce the bandwidth usage for the fronthaul without decreasing LoRa packet delivery rates. Our evaluation shows that with four gateways up to 87.5% PHY samples can be compressed and 1.7x battery life for end devices can be achieved. The second contribution is a novel algorithm to improve the resolution of the radio signals for localisation. The proposed algorithm synchronises multiple non-overlapped communication channels by exploiting the unique features of the LoRa radio to increase the overall bandwidth. We evaluate its performance in an outdoor area of 100 m × 60 m, which shows a median error of 4.4 m, and a 36.2% error reduction compared to the baseline. The above approach improves the accuracy of outdoor localisation; however, it does not work for indoor localisation due to the increase of multiple radio propagation paths. Therefore, our third contribution is an improved super-resolution algorithm for indoor localisation. By exploiting both the original and the conjugate of the physical layer, the algorithm can resolve the multiple paths from multiple reflectors in clustered indoor environments. We evaluate its performance in an indoor area of 25 m × 15 m, which shows that a median error of 2.4 m can be achieved, which is 47.8% and 38.5% less than the baseline approach and the approach without using the conjugate information, respectively. Our evaluation also shows that, different to previous studies in Wi-Fi localisation systems that have significantly wider bandwidth, time-of-fight (ToF) estimation is less effective to LoRa localisation systems with narrowband radio signals

    Bearicade: A Novel High-Performance Computing User and Security Management System Augmented with Machine Learning Technology

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    Despite the rising development and popularity of HPC systems, there have been insufficient advancements towards the security of HPC systems. The substantial computational power, high bandwidth networks, and massive storage capacity provided in the HPC environment are desirable targets for the attackers. The majority of educational institution HPC centres provide their users with simple access methods lacking the modern security needs. Thus, accelerating the systems’ proneness to modern cyber-attacks. The current implementations of HPC access points, such as web portals, offer users direct access to the HPC systems. Consequently, such web portal implementations affect the HPC system with the same security challenges faced by cloud providers and web applications. Although attempts have been made toward securing HPC systems, most of these implementations are outdated, insufficient with the current security standards, or do not integrate well with modern HPC access solutions. To address these security issues, Bearicade, a novel High-Performance Computing (HPC) user and security management system, was designed, developed, implemented and evaluated. Bearicade is a data-driven secure unified framework for managing HPC users and systems security. This framework is an add-on layer to an existing HPC systems software, collecting over 50 different types of information from multiple sources within the HPC systems. It offers Artificial Intelligent security solutions with an added usability and accessibility without adversely affecting the performance and functionality of HPC systems. Throughout this study, the security and usability of Bearicade were validated implementing multiple Machine Learning models. It has been deployed over three years as a production system for students and researchers at the University of Huddersfield QueensGate Grid (QGG) with considerable success, protecting the QGG systems from the summer 2020 attacks that has affected many other HPC systems in research and educational establishments

    Gaming and luxury fashion: exploring factors driving gamers’ luxury virtual in - game fashion

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    This study investigates the factors driving gamers’ intention to purchase virtual luxury fashion in online games. The study’s conceptual framework is grounded in the social identity and social capital theory. A total of 468 responses were collected using an online survey from Fortnite players and analyzed using covariance-based structural equation modelling (CB-SEM). The results reveal that avatar identification was positively associated with perceived value, social presence, and intention to purchase virtual luxury fashion. Perceived value and social presence were positively associated with intending to purchase virtual luxury fashion. Brand love strengthened the positive association between the perceived value and social presence on the intention to purchase virtual luxury fashion. This study contributes to the marketing and information systems literature by offering the first insights into virtual luxury fashion in online games. The findings would assist game developers and marketers in better understanding gamer behaviour to capitalize on virtual luxury fashion

    Reward - based advertisement in online games: a win for advertisers, developers, and gamers

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    This study examines factors affecting gamers’ attitude towards reward-based advertisements (RBA) in online games. A conceptual model is developed based on the Ducoffe’s web advertising model and tested using a quantitative design through data collected from 532 online gamers in Fiji. Covariance-based structural equation modelling (CB-SEM) was employed to perform the analysis. Results reveal that informativeness, credibility, entertainment, and incentive positively influence advertisement value. Advertisement value was found to positively influences attitude towards RBA. The moderating factors of perceived competitiveness and gamer envy were found to strengthen the positive association between perceived advertisement value and attitude towards RBA. This study is novel is it is the first exploration of RBA in online gaming. In so doing, this study contributes to both marketing and gaming literature and provides valuable insight for marketers and game developers to influence customers to be more receptive to advertisements in online games
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