17 research outputs found

    Real-time and Probabilistic Temporal Logics: An Overview

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    Over the last two decades, there has been an extensive study on logical formalisms for specifying and verifying real-time systems. Temporal logics have been an important research subject within this direction. Although numerous logics have been introduced for the formal specification of real-time and complex systems, an up to date comprehensive analysis of these logics does not exist in the literature. In this paper we analyse real-time and probabilistic temporal logics which have been widely used in this field. We extrapolate the notions of decidability, axiomatizability, expressiveness, model checking, etc. for each logic analysed. We also provide a comparison of features of the temporal logics discussed

    A Framework to Specify System Requirements using Natural interpretation of UML/MARTE diagrams

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    International audienceThe ever-increasing design complexity of embedded systems is constantly pressing the demand for more abstract design levels and possible methods for automatic verification and synthesis. Transforming a text-based user requirements document into semantically sound models is always difficult and error-prone as mostly these requirements are vague and improperly documented. This paper presents a framework to specify textual requirements graphically in standard modeling formalisms like uml and marte in the form of temporal and logical patterns. The underlying formal semantics of these graphical models allow to eliminate ambiguity in specifications and automatic design verification at different abstraction levels using these patterns. The semantics of these operators/patterns are presented formally as state automatons and a comparison is made to the existing ccsl relational operators. To reap the benefits of mde, a software plugin TemLoPAC is presented as part of the framework to transform the graphical patterns into ccsl and Verilog-based observers

    UML/MARTE pour la spécicationd'exigences systèmes (version étendue)

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    To verify embedded systems early in the design stages, we need formal ways to requirements specification which can be as close as possible to natural language interpretation, away from the lower ESL/RTL levels. This paper proposes to contribute to the FSL (Formal Specification Level) by specifying natural language requirements graphically in the form of temporal patterns. Standard modeling artifacts like UML and MARTE are used to provide formal semantics of these graphical models allowing to eliminate ambiguity in specifications and automatic design verification at different abstraction levels using these patterns.Pour vérifier des systèmes embarqués tôt dans le cycle de conception, il est nécessaire de disposerde langages d'exigences aussi proche que possible de l'expression des besoins en langage naturel. Ce papier s'inscrit dans l'initiative FSL (Formal Specification Level) et propose un langage graphique, s'appuyant sur UML pour décrire des exigences formelles basées sur un ensemble de patrons temporels. Il réutilise très largement des constructions UML et MARTE et s'appuie sur la sémantique du langage CCSL pour éliminer les ambiguïtés dans les spécifications, exécuterles modèles et permettre la vérification de ces modèles au niveau système

    The Creator and the Benefits of Creation: Protection of Software in the Information Revolution

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    Mankind is presently passing through a technological revolution unlike anything seen in any prior era. In a world where the total mass of man\u27s knowledge doubles in less than two years\u27 information has become an increasingly valuable commodity. Similarly, the means by which information is manipulated has become evermore important. The development of the computer 2 has been the catalyst of this information revolution as it has freed man from many time consuming and monotonous tasks. The development of the computer industry has been phenomenal. 3 It has gone from its infancy in the late 1940\u27s to a stage where annual sales figures read in the hundred billion dollar range. The growth of this industry has been marked 4 by a seemingly continuous series of lawsuits. In fact, the first computer law suit was between the rival claimants to the honour (and Patent rights) of being the first inventor of the computer

    Dyretiva: um método para a verificação das restrições temporais em sistemas embarcados

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    The Dyretiva is a method used for verifying the time constraints of embedded realtime systems. The verification is performed by monitoring the embedded software when it is running in an embedded hardware. The Dyretiva method takes into account the resource constrained nature of embedded systems and the time bounded nature of real-time systems. The method is comprised by a monitoring approach and a fault model. The monitoring approach defines the physical and the logical interfaces used in the observation of the system under test, as well as the strategies used for an optimized trace data collection. The fault model identifies relationships and components of the system under test that are most likely to have time faults. To demonstrate Dyretiva concepts, a set of support tools called SoftScope has been developed. SoftScope is comprised of a source code pre-instrumentation tool, a source code instrumentation tool, a hybrid monitor, a program for controlling the hybrid monitor, programs for filtering and analyzing trace data, and a graphical presentation tool. The Dyretiva method and the SoftScope tool set are an integral part of the work-inprogress PERF project, which is under development in the LIT (Laboratory of Embedded Systems Innovation and Technology), at the UTFPR (Federal Technological University of Paraná State). The objective of the PERF project is to build a complete environment suitable for the development of embedded and real-time systems.O Dyretiva é um método desenvolvido para utilização na fase de testes de sistemas embarcados operando em tempo real e, em especial, na verificação das restrições temporais do sistema. Como a fase de testes situa-se no final do processo de desenvolvimento, quando o hardware está disponível e o software codificado, a verificação temporal é feita por meio de monitoração do sistema sob teste. As principais premissas do Dyretiva são considerar a limitação de recursos dos sistemas embarcados e as características intrínsecas dos sistemas em tempo real. O método é definido por uma abordagem de monitoração e por um modelo de falta. A abordagem de monitoração define a interface física e lógica necessárias para observar o sistema sob teste, bem como as estratégias de utilização que permitem otimizar a coleta de dados. O modelo de falta identifica as relações e componentes do sistema onde existe maior probabilidade de encontrar os erros procurados. Para demonstrar os conceitos do Dyretiva, um conjunto de ferramentas de apoio a aplicação do método foi construído. Este conjunto, chamado de SoftScope, é composto por seis ferramentas: um pré-instrumentador de código, um instrumentador de código, um monitor, um programa de controle do monitor, programas para filtragem e análise dos dados capturados e um programa de visualização dos resultados. O Dyretiva e o SoftScope são parte integrante do projeto PERF, que está em andamento no LIT (Laboratório de Inovação e Tecnologia em Sistemas Embarcados) da UTFPR (Universidade Tecnológica Federal do Paraná), cujo objetivo é construir um ambiente completo para o desenvolvimento de sistemas embarcados operando em tempo real

    Assessing site performance of large mine water chilling machines using refrigerant-circuit measurements and machine modelling

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    A thesis submitted to the Faculty of Engineering, University of the Witwatersrand, Johat.nesburq, in fulfilment of the requirements for the degree of Doctor of Philosophy Johannesburg, 1998This thesis contributes to accurate, practicable techniques of ascertaining and assessing site performance of large refrigerating machines chilling water 'for cooling deep South African mines. It applies to all vapourcompression machines cooling fluids in steady, continuous processes. To assess whether a water chilling machine is performing satisfactorily, both its actual performance, and the corresponding normal or optimal performance of which it is capable, must be ascertained. Both requirements r esent difficulties on site. in particular, the traditional "heat balance" method of verifying the apparent performance obtained from measurements in the water circuits does not prove that such performance is accurate. The calibration of typical site instrumentation is not assured, so an "acceptable" heat imbalance may conceal large but similar errors - which thus also balance out - in the apparent constituents of the heat balance. Three methods of independently ascertaining actual performance, so verifying apparent performance, are presented, The first is an enhanced method, applicable to custom-built machines as well as conventional ones, of ascertaining the efficiency of the actual refrigerating process from measurements in the refrigerant circuit. This detects errors concealed in an "acceptable" heat balance. Where some refrigerant-circuit measurements are unavailable, an inexact version of this method still indicates the relative likelihood of the apparent performance being acceptably accurate. The third method, where these two are inadequate, is ascertaining actual performance using available measurements and fundamental machine modelling. Such modelling is also the most versatile method of predicting corresponding normal or optimal performance. A computer program simulating complete mine water chilling installations is used here. Actual performance can then be meaningfully assessed and appropriate remedial action justified, as shown in seven case studies. An outcorr.e for conventional water chillinq machines with a centrifugal compressor is that keeping heat exchangers clean may prejudice efficiency under part-duties lf a machine has been designed for optimum efficiency at full duty. An alternative control philosophy of maximising the machine load may then yield better performance. If these techniques are included ill an automated system of fault diagnosis, they will be of most use to burdened mine staff, who are generally not refrigeration experts

    Minimal time control of linear systems with control amplitude and rate saturations

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    Time optimal control of linear systems with constraints on control amplitude and rat

    Annual reports of the town of Gilford, New Hampshire, for the year ending December 31, 1980.

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    This is an annual report containing vital statistics for a town/city in the state of New Hampshire
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