17,210 research outputs found
The RAM equivalent of P vs. RP
One of the fundamental open questions in computational complexity is whether
the class of problems solvable by use of stochasticity under the Random
Polynomial time (RP) model is larger than the class of those solvable in
deterministic polynomial time (P). However, this question is only open for
Turing Machines, not for Random Access Machines (RAMs).
Simon (1981) was able to show that for a sufficiently equipped Random Access
Machine, the ability to switch states nondeterministically does not entail any
computational advantage. However, in the same paper, Simon describes a
different (and arguably more natural) scenario for stochasticity under the RAM
model. According to Simon's proposal, instead of receiving a new random bit at
each execution step, the RAM program is able to execute the pseudofunction
, which returns a uniformly distributed random integer in the
range . Whether the ability to allot a random integer in this fashion is
more powerful than the ability to allot a random bit remained an open question
for the last 30 years.
In this paper, we close Simon's open problem, by fully characterising the
class of languages recognisable in polynomial time by each of the RAMs
regarding which the question was posed. We show that for some of these,
stochasticity entails no advantage, but, more interestingly, we show that for
others it does.Comment: 23 page
PLTL Partitioned Model Checking for Reactive Systems under Fairness Assumptions
We are interested in verifying dynamic properties of finite state reactive
systems under fairness assumptions by model checking. The systems we want to
verify are specified through a top-down refinement process. In order to deal
with the state explosion problem, we have proposed in previous works to
partition the reachability graph, and to perform the verification on each part
separately. Moreover, we have defined a class, called Bmod, of dynamic
properties that are verifiable by parts, whatever the partition. We decide if a
property P belongs to Bmod by looking at the form of the Buchi automaton that
accepts the negation of P. However, when a property P belongs to Bmod, the
property f => P, where f is a fairness assumption, does not necessarily belong
to Bmod. In this paper, we propose to use the refinement process in order to
build the parts on which the verification has to be performed. We then show
that with such a partition, if a property P is verifiable by parts and if f is
the expression of the fairness assumptions on a system, then the property f =>
P is still verifiable by parts. This approach is illustrated by its application
to the chip card protocol T=1 using the B engineering design language
Advanced Testing Chain Supporting the Validation of Smart Grid Systems and Technologies
New testing and development procedures and methods are needed to address
topics like power system stability, operation and control in the context of
grid integration of rapidly developing smart grid technologies. In this
context, individual testing of units and components has to be reconsidered and
appropriate testing procedures and methods need to be described and
implemented. This paper addresses these needs by proposing a holistic and
enhanced testing methodology that integrates simulation/software- and
hardware-based testing infrastructure. This approach presents the advantage of
a testing environment, which is very close to f i eld testing, includes the
grid dynamic behavior feedback and is risks-free for the power system, for the
equipment under test and for the personnel executing the tests. Furthermore,
this paper gives an overview of successful implementation of the proposed
testing approach within different testing infrastructure available at the
premises of different research institutes in Europe.Comment: 2018 IEEE Workshop on Complexity in Engineering (COMPENG
Verifying Real-Time Systems using Explicit-time Description Methods
Timed model checking has been extensively researched in recent years. Many
new formalisms with time extensions and tools based on them have been
presented. On the other hand, Explicit-Time Description Methods aim to verify
real-time systems with general untimed model checkers. Lamport presented an
explicit-time description method using a clock-ticking process (Tick) to
simulate the passage of time together with a group of global variables for time
requirements. This paper proposes a new explicit-time description method with
no reliance on global variables. Instead, it uses rendezvous synchronization
steps between the Tick process and each system process to simulate time. This
new method achieves better modularity and facilitates usage of more complex
timing constraints. The two explicit-time description methods are implemented
in DIVINE, a well-known distributed-memory model checker. Preliminary
experiment results show that our new method, with better modularity, is
comparable to Lamport's method with respect to time and memory efficiency
Verifying service continuity in a satellite reconfiguration procedure: application to a satellite
The paper discusses the use of the TURTLE UML profile to model and verify service continuity during dynamic reconfiguration of embedded software, and space-based telecommunication software in particular. TURTLE extends UML class diagrams with composition operators, and activity diagrams with temporal operators. Translating TURTLE to the formal description technique RT-LOTOS gives the profile a formal semantics and makes it possible to reuse verification techniques implemented by the RTL, the RT-LOTOS toolkit developed at LAAS-CNRS. The paper proposes a modeling and formal validation methodology based on TURTLE and RTL, and discusses its application to a payload software application in charge of an embedded packet switch. The paper demonstrates the benefits of using TURTLE to prove service continuity for dynamic reconfiguration of embedded software
Towards Practical Graph-Based Verification for an Object-Oriented Concurrency Model
To harness the power of multi-core and distributed platforms, and to make the
development of concurrent software more accessible to software engineers,
different object-oriented concurrency models such as SCOOP have been proposed.
Despite the practical importance of analysing SCOOP programs, there are
currently no general verification approaches that operate directly on program
code without additional annotations. One reason for this is the multitude of
partially conflicting semantic formalisations for SCOOP (either in theory or
by-implementation). Here, we propose a simple graph transformation system (GTS)
based run-time semantics for SCOOP that grasps the most common features of all
known semantics of the language. This run-time model is implemented in the
state-of-the-art GTS tool GROOVE, which allows us to simulate, analyse, and
verify a subset of SCOOP programs with respect to deadlocks and other
behavioural properties. Besides proposing the first approach to verify SCOOP
programs by automatic translation to GTS, we also highlight our experiences of
applying GTS (and especially GROOVE) for specifying semantics in the form of a
run-time model, which should be transferable to GTS models for other concurrent
languages and libraries.Comment: In Proceedings GaM 2015, arXiv:1504.0244
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A two‐step authentication framework for Mobile ad hoc networks
The lack of fixed infrastructure in ad hoc networks causes nodes to rely more heavily on peer nodes for communication. Nevertheless, establishing trust in such a distributed environment is very difficult, since it is not straightforward for a node to determine if its peer nodes can be trusted. An additional concern in such an environment is with whether a peer node is merely relaying a message or if it is the originator of the message. In this paper, we propose an authentication approach for protecting nodes in mobile ad hoc networks. The security requirements for protecting data link and network layers are identified and the design criteria for creating secure ad hoc networks using several authentication protocols are analyzed. Protocols based on zero knowledge and challenge response techniques are presented and their performance is evaluated through analysis and simulation
Fast Discrete Consensus Based on Gossip for Makespan Minimization in Networked Systems
In this paper we propose a novel algorithm to solve the discrete consensus problem, i.e., the problem of distributing evenly a set of tokens of arbitrary weight among the nodes of a networked system. Tokens are tasks to be executed by the nodes and the proposed distributed algorithm minimizes monotonically the makespan of the assigned tasks. The algorithm is based on gossip-like asynchronous local interactions between the nodes. The convergence time of the proposed algorithm is superior with respect to the state of the art of discrete and quantized consensus by at least a factor O(n) in both theoretical and empirical comparisons
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